1#!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c
2/*
3** ###################################################################
4**     Processors:          LPC55S36JBD100
5**                          LPC55S36JHI48
6**
7**     Compiler:            Keil ARM C/C++ Compiler
8**     Reference manual:    LPC55S3x Reference Manual Rev. DraftG, 07/2021
9**     Version:             rev. 1.1, 2021-08-04
10**     Build:               b210913
11**
12**     Abstract:
13**         Linker file for the Keil ARM C/C++ Compiler
14**
15**     Copyright 2016 Freescale Semiconductor, Inc.
16**     Copyright 2016-2021 NXP
17**     All rights reserved.
18**
19**     SPDX-License-Identifier: BSD-3-Clause
20**
21**     http:                 www.nxp.com
22**     mail:                 support@nxp.com
23**
24** ###################################################################
25*/
26
27
28/* USB BDT size */
29#define usb_bdt_size                   0x0
30/* Sizes */
31#if (defined(__stack_size__))
32  #define Stack_Size                   __stack_size__
33#else
34  #define Stack_Size                   0x0400
35#endif
36
37#if (defined(__heap_size__))
38  #define Heap_Size                    __heap_size__
39#else
40  #define Heap_Size                    0x0400
41#endif
42
43#if (defined(__pkc__))
44  #define retention_RAMsize            0x00004000  /* SRAM A(16K) reserved for pkc */
45#elif (defined(__power_down__))
46  #define retention_RAMsize            0x00000604  /* The first 0x604 bytes reserved to CPU retention for power down mode */
47#else
48  #define retention_RAMsize            0x00000000
49#endif
50
51#if (defined(__powerquad__))
52  #define powerquad_RAMsize            0x00004000  /* SRAM E(16K) reserved for powerquad */
53#else
54  #define powerquad_RAMsize            0x00000000
55#endif
56
57#define  m_interrupts_start            0x00000000
58#define  m_interrupts_size             0x00000400
59
60#define  m_text_start                  0x00000400
61#define  m_text_size                   0x0003D400
62
63#define  m_data_start                  0x20000000 + retention_RAMsize
64#define  m_data_size                   0x0001C000 - retention_RAMsize - powerquad_RAMsize
65
66#define  m_sramx_start                 0x04000000
67#define  m_sramx_size                  0x00004000
68
69LR_m_text m_interrupts_start m_interrupts_size+m_text_size {   ; load region size_region
70
71  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
72    * (.isr_vector,+FIRST)
73  }
74
75  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
76    * (InRoot$$Sections)
77    .ANY (+RO)
78  }
79
80  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
81    .ANY (+RW +ZI)
82  }
83
84  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
85  }
86  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
87  }
88}
89