1 /*
2 * Copyright (c) 2006-2024, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2023-03-24 YangXi the first version.
9 */
10
11 #include "drv_pin.h"
12
13 #include "fsl_common.h"
14 #include "fsl_gpio.h"
15 #include "fsl_port.h"
16 #include "fsl_inputmux.h"
17
18 #ifdef RT_USING_PIN
19
20 #define DBG_TAG "drv.pin"
21 #define DBG_LVL DBG_INFO
22 #include <rtdbg.h>
23
24 #define GET_GPIO_PORT(x) ((x) / 32)
25 #define GET_GPIO_PIN(x) ((x) % 32)
26
27 static struct rt_pin_ops mcx_pin_ops;
28
29 static GPIO_Type *GPIO_TYPE_TBL[] = GPIO_BASE_PTRS;
30 static PORT_Type *PORT_TYPE_TBL[] = PORT_BASE_PTRS;
31 static IRQn_Type IRQ_TYPE_TBL[] = GPIO_IRQS;
32
33
34 #define PIN2GPIO(x) GPIO_TYPE_TBL[GET_GPIO_PORT(x)]
35 #define PIN2PORT(x) PORT_TYPE_TBL[GET_GPIO_PORT(x)]
36 #define PIN2IRQ(x) IRQ_TYPE_TBL[GET_GPIO_PORT(x)]
37
38 struct rt_pin_irq_hdr pin_irq_hdr_tab[32*5] = {0};
39
mcx_pin_mode(rt_device_t dev,rt_base_t pin,rt_uint8_t mode)40 static void mcx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
41 {
42 port_pin_config_t port_pin_config = {0};
43 gpio_pin_config_t gpio_pin_config = {0};
44
45 port_pin_config.mux = kPORT_MuxAlt0;
46
47 switch (mode)
48 {
49 case PIN_MODE_OUTPUT:
50 {
51 gpio_pin_config.pinDirection = kGPIO_DigitalOutput;
52 port_pin_config.pullSelect = kPORT_PullDisable;
53 port_pin_config.inputBuffer = kPORT_InputBufferEnable;
54 }
55 break;
56
57 case PIN_MODE_INPUT:
58 {
59 gpio_pin_config.pinDirection = kGPIO_DigitalInput;
60 port_pin_config.pullSelect = kPORT_PullDisable;
61 port_pin_config.inputBuffer = kPORT_InputBufferEnable;
62 }
63 break;
64
65 case PIN_MODE_INPUT_PULLDOWN:
66 {
67 gpio_pin_config.pinDirection = kGPIO_DigitalInput;
68 port_pin_config.pullSelect = kPORT_PullDown;
69 port_pin_config.pullValueSelect = kPORT_LowPullResistor;
70 port_pin_config.inputBuffer = kPORT_InputBufferEnable;
71 }
72 break;
73
74 case PIN_MODE_INPUT_PULLUP:
75 {
76 gpio_pin_config.pinDirection = kGPIO_DigitalInput;
77 port_pin_config.pullSelect = kPORT_PullUp;
78 port_pin_config.pullValueSelect = kPORT_LowPullResistor;
79 port_pin_config.inputBuffer = kPORT_InputBufferEnable;
80 }
81 break;
82
83 case PIN_MODE_OUTPUT_OD:
84 {
85 port_pin_config.openDrainEnable = kPORT_OpenDrainEnable;
86 gpio_pin_config.pinDirection = kGPIO_DigitalOutput;
87 port_pin_config.inputBuffer = kPORT_InputBufferEnable;
88 }
89 break;
90 }
91
92 PORT_SetPinConfig(PIN2PORT(pin), GET_GPIO_PIN(pin), &port_pin_config);
93 GPIO_PinInit(PIN2GPIO(pin), GET_GPIO_PIN(pin) , &gpio_pin_config);
94 }
95
96
mcx_pin_write(rt_device_t dev,rt_base_t pin,rt_uint8_t value)97 static void mcx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
98 {
99 GPIO_PinWrite(PIN2GPIO(pin), GET_GPIO_PIN(pin), value);
100 }
101
mcx_pin_read(rt_device_t dev,rt_base_t pin)102 static rt_ssize_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
103 {
104 return GPIO_PinRead(PIN2GPIO(pin), GET_GPIO_PIN(pin));
105 }
106
107
pin_irq_handler(uint8_t gpio_idx)108 rt_inline void pin_irq_handler(uint8_t gpio_idx)
109 {
110 int i;
111
112 rt_interrupt_enter();
113
114 uint32_t INTFLAG = GPIO_GpioGetInterruptFlags(GPIO_TYPE_TBL[gpio_idx]);
115 GPIO_GpioClearInterruptFlags(GPIO_TYPE_TBL[gpio_idx], INTFLAG);
116
117
118 for(i=0; i<ARRAY_SIZE(pin_irq_hdr_tab); i++)
119 {
120 if((INTFLAG & (1<<GET_GPIO_PIN(pin_irq_hdr_tab[i].pin))) && pin_irq_hdr_tab[i].hdr && (GET_GPIO_PORT(pin_irq_hdr_tab[i].pin)) == gpio_idx)
121 {
122 pin_irq_hdr_tab[i].hdr(pin_irq_hdr_tab[i].args);
123 }
124 }
125
126 rt_interrupt_leave();
127 }
128
GPIO0_IRQHandler(void)129 void GPIO0_IRQHandler(void)
130 {
131 pin_irq_handler(0);
132 }
133
GPIO1_IRQHandler(void)134 void GPIO1_IRQHandler(void)
135 {
136 pin_irq_handler(1);
137 }
138
GPIO2_IRQHandler(void)139 void GPIO2_IRQHandler(void)
140 {
141 pin_irq_handler(2);
142 }
143
GPIO3_IRQHandler(void)144 void GPIO3_IRQHandler(void)
145 {
146 pin_irq_handler(3);
147 }
148
GPIO4_IRQHandler(void)149 void GPIO4_IRQHandler(void)
150 {
151 pin_irq_handler(4);
152 }
153
154
mcx_pin_attach_irq(struct rt_device * device,rt_base_t pin,rt_uint8_t mode,void (* hdr)(void * args),void * args)155 static rt_err_t mcx_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args)
156 {
157 switch (mode)
158 {
159 case PIN_IRQ_MODE_RISING:
160 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptRisingEdge);
161 break;
162 case PIN_IRQ_MODE_FALLING:
163 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptFallingEdge);
164 break;
165 case PIN_IRQ_MODE_RISING_FALLING:
166 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptEitherEdge);
167 break;
168 case PIN_IRQ_MODE_HIGH_LEVEL:
169 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptLogicOne);
170 break;
171 case PIN_IRQ_MODE_LOW_LEVEL:
172 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptLogicZero);
173 break;
174 }
175
176 pin_irq_hdr_tab[pin].pin = pin;
177 pin_irq_hdr_tab[pin].mode = mode;
178 pin_irq_hdr_tab[pin].hdr = hdr;
179 pin_irq_hdr_tab[pin].args = args;
180
181 return RT_EOK;
182 }
183
mcx_pin_detach_irq(struct rt_device * device,rt_base_t pin)184 static rt_err_t mcx_pin_detach_irq(struct rt_device *device, rt_base_t pin)
185 {
186 GPIO_SetPinInterruptConfig(PIN2GPIO(pin), GET_GPIO_PIN(pin), kGPIO_InterruptStatusFlagDisabled);
187 return RT_EOK;
188 }
189
mcx_pin_irq_enable(struct rt_device * device,rt_base_t pin,rt_uint8_t enabled)190 static rt_err_t mcx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
191 {
192 if(enabled)
193 {
194 EnableIRQ(PIN2IRQ(pin));
195 }
196 else
197 {
198 DisableIRQ(PIN2IRQ(pin));
199 }
200
201 return RT_EOK;
202 }
203
rt_hw_pin_init(void)204 int rt_hw_pin_init(void)
205 {
206 int ret = RT_EOK;
207
208 mcx_pin_ops.pin_mode = mcx_pin_mode;
209 mcx_pin_ops.pin_read = mcx_pin_read;
210 mcx_pin_ops.pin_write = mcx_pin_write;
211 mcx_pin_ops.pin_attach_irq = mcx_pin_attach_irq;
212 mcx_pin_ops.pin_detach_irq = mcx_pin_detach_irq;
213 mcx_pin_ops.pin_irq_enable = mcx_pin_irq_enable;
214 mcx_pin_ops.pin_get = RT_NULL,
215
216 ret = rt_device_pin_register("pin", &mcx_pin_ops, RT_NULL);
217
218 return ret;
219 }
220 INIT_BOARD_EXPORT(rt_hw_pin_init);
221
222 #endif /*RT_USING_PIN */
223
224 // end file
225