1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2021-02-17     GuEe-GUI     the first version
9  */
10 
11 #ifndef VIRT_H__
12 #define VIRT_H__
13 
14 #include <rtdef.h>
15 #include <ioremap.h>
16 
17 #ifdef RT_USING_SMART
18 #include <mmu.h>
19 #endif
20 
21 #define __REG32(x)          (*((volatile unsigned int *)(x)))
22 #define __REG16(x)          (*((volatile unsigned short *)(x)))
23 
24 /* UART */
25 #define PL011_UART0_BASE    0x09000000
26 #define PL011_UART0_SIZE    0x00001000
27 #define PL011_UART0_IRQNUM  (32 + 1)
28 
29 /* RTC */
30 #define PL031_RTC_BASE      0x9010000
31 #define PL031_RTC_SIZE      0x00001000
32 #define PL031_RTC_IRQNUM    (32 + 2)
33 
34 /* GPIO */
35 #define PL061_GPIO_BASE     0x09030000
36 #define PL061_GPIO_SIZE     0x00001000
37 #define PL061_GPIO_IRQNUM   (32 + 7)
38 
39 /* VirtIO */
40 #define VIRTIO_MMIO_BASE    0x0a000000
41 #define VIRTIO_MMIO_SIZE    0x00000200
42 #define VIRTIO_MAX_NR       32
43 #define VIRTIO_IRQ_BASE     (32 + 16)
44 #define VIRTIO_VENDOR_ID    0x554d4551  /* "QEMU" */
45 
46 /* GIC */
47 #define MAX_HANDLERS        96
48 #define GIC_IRQ_START       0
49 #define ARM_GIC_NR_IRQS     96
50 #define ARM_GIC_MAX_NR      1
51 
52 #define IRQ_ARM_IPI_KICK    0
53 #define IRQ_ARM_IPI_CALL    1
54 
55 /* GICv2 */
56 #define GIC_PL390_DISTRIBUTOR_PPTR      0x08000000
57 #define GIC_PL390_CONTROLLER_PPTR       0x08010000
58 #define GIC_PL390_HYPERVISOR_BASE       0x08030000
59 #define GIC_PL390_VIRTUAL_CPU_BASE      0x08040000
60 
61 /* GICv3 */
62 #define GIC_PL500_DISTRIBUTOR_PPTR      GIC_PL390_DISTRIBUTOR_PPTR
63 #define GIC_PL500_REDISTRIBUTOR_PPTR    0x080a0000
64 #define GIC_PL500_CONTROLLER_PPTR       GIC_PL390_CONTROLLER_PPTR
65 #define GIC_PL500_ITS_PPTR              0x08080000
66 
67 /* the basic constants and interfaces needed by gic */
platform_get_gic_dist_base(void)68 rt_inline rt_ubase_t platform_get_gic_dist_base(void)
69 {
70 #ifdef BSP_USING_GICV2
71     return GIC_PL390_DISTRIBUTOR_PPTR;
72 #else
73     return GIC_PL500_DISTRIBUTOR_PPTR;
74 #endif
75 }
76 
platform_get_gic_redist_base(void)77 rt_inline rt_ubase_t platform_get_gic_redist_base(void)
78 {
79     return GIC_PL500_REDISTRIBUTOR_PPTR;
80 }
81 
platform_get_gic_cpu_base(void)82 rt_inline rt_ubase_t platform_get_gic_cpu_base(void)
83 {
84 #ifdef BSP_USING_GICV2
85     return GIC_PL390_CONTROLLER_PPTR;
86 #else
87     return GIC_PL500_CONTROLLER_PPTR;
88 #endif
89 }
90 
platform_get_gic_its_base(void)91 rt_inline rt_ubase_t platform_get_gic_its_base(void)
92 {
93     return GIC_PL500_ITS_PPTR;
94 }
95 
96 #endif
97