1 /* 2 * Copyright (c) 2006-2020, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 */ 9 10 #ifndef __DRV_UART_H__ 11 #define __DRV_UART_H__ 12 13 #include "riscv_io.h" 14 15 /** 16 * uart ns16550a 17 * http://byterunner.com/16550.html 18 */ 19 20 /* TRANSMIT AND RECEIVE HOLDING REGISTER */ 21 #define UART_RHR 0 22 #define UART_THR 0 23 24 /* INTERRUPT ENABLE REGISTER */ 25 #define UART_IER 1 26 #define UART_IER_RX_ENABLE (1 << 0) 27 #define UART_IER_TX_ENABLE (1 << 1) 28 29 /* FIFO CONTROL REGISTER */ 30 #define UART_FCR 2 31 #define UART_FCR_FIFO_ENABLE (1 << 0) 32 #define UART_FCR_FIFO_CLEAR (3 << 1) 33 34 /* INTERRUPT STATUS REGISTER */ 35 #define UART_ISR 2 36 37 /* LINE CONTROL REGISTER */ 38 #define UART_LCR 3 39 #define UART_LCR_EIGHT_BITS (3 << 0) 40 // special mode to set baud rate 41 #define UART_LCR_BAUD_LATCH (1 << 7) 42 43 /* LINE STATUS REGISTER */ 44 #define UART_LSR 5 45 // input is waiting to be read from RHR 46 #define UART_LSR_RX_READY (1 << 0) 47 // THR can accept another character to send 48 #define UART_LSR_TX_IDLE (1 << 5) 49 50 #define UART_REFERENCE_CLOCK 1843200 51 #define UART_DEFAULT_BAUDRATE 115200 52 53 extern void *uart0_base; 54 55 #define write8_uart0(idx, value) __raw_writeb(((rt_uint8_t)value), (void*)((size_t)uart0_base + (idx))) 56 #define read8_uart0(idx) __raw_readb((void*)((size_t)uart0_base + (idx))) 57 58 void rt_hw_uart_start_rx_thread(); 59 int rt_hw_uart_init(void); 60 void drv_uart_puts(char *str); // for syscall 61 62 #endif /* __DRV_UART_H__ */ 63