1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018/5/5       Bernard      The first version
9  */
10 
11 #include <rthw.h>
12 #include <rtthread.h>
13 #include <rtdevice.h>
14 
15 #include "board.h"
16 #include "drv_uart.h"
17 
18 #include <rtdevice.h>
19 
20 #define AUX_BASE            (0x3F000000 + 0x215000)
21 
22 struct hw_uart_device
23 {
24     rt_uint32_t hw_base;
25     rt_uint32_t irqno;
26 };
27 
uart_configure(struct rt_serial_device * serial,struct serial_configure * cfg)28 static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
29 {
30     struct hw_uart_device *uart;
31 
32     RT_ASSERT(serial != RT_NULL);
33     uart = (struct hw_uart_device *)serial->parent.user_data;
34 
35     if (uart->hw_base == AUX_BASE)
36     {
37         uint32_t value;
38 
39         /* GPIO function set */
40         value = GPIO_GPFSEL1;
41         value &= ~(7<<12); /* GPIO14 */
42         value |=    2<<12 ; /* ALT5 */
43         value &= ~(7<<15); /* GPIO15 */
44         value |=    2<<15 ; /* ALT5 */
45         GPIO_GPFSEL1 = value;
46 
47         /* PullUD disable */
48         GPIO_GPPUD = 0;
49         GPIO_GPPUDCLK0 = (1 << 14) | (1 << 15);
50         GPIO_GPPUDCLK0 = 0;
51 
52         AUX_ENABLES(uart->hw_base)      = 1;    /* Enable UART1 */
53         AUX_MU_IER_REG(uart->hw_base)   = 0;    /* Disable interrupt */
54         AUX_MU_CNTL_REG(uart->hw_base)  = 0;    /* Disable Transmitter and Receiver */
55         AUX_MU_LCR_REG(uart->hw_base)   = 3;    /* Works in 8-bit mode */
56         AUX_MU_MCR_REG(uart->hw_base)   = 0;    /* Disable RTS */
57         AUX_MU_IIR_REG(uart->hw_base)   = 0xC6; /* Enable FIFO, Clear FIFO */
58         AUX_MU_BAUD_REG(uart->hw_base)  = 270;  /* 115200 = system clock 250MHz / (8 * (baud + 1)), baud = 270 */
59         AUX_MU_CNTL_REG(uart->hw_base)  = 3;    /* Enable Transmitter and Receiver */
60     }
61 
62     return RT_EOK;
63 }
64 
uart_control(struct rt_serial_device * serial,int cmd,void * arg)65 static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
66 {
67     struct hw_uart_device *uart;
68 
69     RT_ASSERT(serial != RT_NULL);
70     uart = (struct hw_uart_device *)serial->parent.user_data;
71 
72     switch (cmd)
73     {
74     case RT_DEVICE_CTRL_CLR_INT:
75         /* disable rx irq */
76         AUX_MU_IER_REG(uart->hw_base) = 0x0;
77         rt_hw_interrupt_mask(uart->irqno);
78         break;
79 
80     case RT_DEVICE_CTRL_SET_INT:
81         /* enable rx irq */
82         AUX_MU_IER_REG(uart->hw_base) = 0x1;
83         rt_hw_interrupt_umask(uart->irqno);
84         break;
85     }
86 
87     return RT_EOK;
88 }
89 
uart_putc(struct rt_serial_device * serial,char c)90 static int uart_putc(struct rt_serial_device *serial, char c)
91 {
92     struct hw_uart_device *uart;
93 
94     RT_ASSERT(serial != RT_NULL);
95     uart = (struct hw_uart_device *)serial->parent.user_data;
96 
97     while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20));
98     AUX_MU_IO_REG(uart->hw_base) = c;
99 
100     return 1;
101 }
102 
uart_getc(struct rt_serial_device * serial)103 static int uart_getc(struct rt_serial_device *serial)
104 {
105     int ch = -1;
106     struct hw_uart_device *uart;
107 
108     RT_ASSERT(serial != RT_NULL);
109     uart = (struct hw_uart_device *)serial->parent.user_data;
110 
111     if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01))
112     {
113         ch = AUX_MU_IO_REG(uart->hw_base) & 0xff;
114     }
115 
116     return ch;
117 }
118 
119 static const struct rt_uart_ops _uart_ops =
120 {
121     uart_configure,
122     uart_control,
123     uart_putc,
124     uart_getc,
125 };
126 
rt_hw_uart_isr(int irqno,void * param)127 static void rt_hw_uart_isr(int irqno, void *param)
128 {
129     struct rt_serial_device *serial = (struct rt_serial_device*)param;
130 
131     rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
132 }
133 
134 #ifdef RT_USING_UART0
135 /* UART device driver structure */
136 static struct hw_uart_device _uart0_device =
137 {
138     RPI_UART0_BASE,
139     IRQ_PBA8_UART0,
140 };
141 static struct rt_serial_device _serial0;
142 #endif
143 
144 #ifdef RT_USING_UART1
145 /* UART1 device driver structure */
146 static struct hw_uart_device _uart1_device =
147 {
148     AUX_BASE,
149     IRQ_AUX,
150 };
151 static struct rt_serial_device _serial1;
152 #endif
153 
rt_hw_uart_init(void)154 int rt_hw_uart_init(void)
155 {
156     struct hw_uart_device *uart;
157     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
158 
159 #ifdef RT_USING_UART0
160     uart = &_uart0_device;
161 
162     _serial0.ops    = &_uart_ops;
163     _serial0.config = config;
164 
165     /* register UART1 device */
166     rt_hw_serial_register(&_serial0, "uart0",
167                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
168                           uart);
169     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial0, "uart0");
170 #endif
171 
172 #ifdef RT_USING_UART1
173     uart = &_uart1_device;
174     _serial1.ops = &_uart_ops;
175     _serial1.config = config;
176 
177     /* register UART1 device */
178     rt_hw_serial_register(&_serial1, "uart1",
179                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
180     /* enable Rx and Tx of UART */
181     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial1, "uart1");
182 #endif
183 
184     return 0;
185 }
186