1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018/5/5       Bernard      The first version
9  */
10 
11 #include <rthw.h>
12 #include <rtthread.h>
13 #include <rtdevice.h>
14 
15 #include "board.h"
16 #include "drv_uart.h"
17 
18 #include <rtdevice.h>
19 
20 #define AUX_BASE            (0x3F000000 + 0x215000)
21 
22 struct hw_uart_device
23 {
24     rt_uint32_t hw_base;
25     rt_uint32_t irqno;
26 };
27 
uart_configure(struct rt_serial_device * serial,struct serial_configure * cfg)28 static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
29 {
30     struct hw_uart_device *uart;
31 
32     RT_ASSERT(serial != RT_NULL);
33     uart = (struct hw_uart_device *)serial->parent.user_data;
34 
35     if (uart->hw_base == AUX_BASE)
36     {
37         rt_uint32_t value;
38 
39         /* GPIO function set */
40         value = BCM283X_GPIO_GPFSEL(1);
41         value &= ~(7 << 12); /* GPIO14 */
42         value |= 2 << 12 ; /* ALT5 */
43         value &= ~(7 << 15); /* GPIO15 */
44         value |= 2 << 15 ; /* ALT5 */
45         BCM283X_GPIO_GPFSEL(1) = value;
46 
47         BCM283X_GPIO_GPPUD = 0;
48         BCM283X_GPIO_GPPUDCLK(0) = (1 << 14) | (1 << 15);
49         BCM283X_GPIO_GPPUDCLK(0) = 0;
50 
51         AUX_ENABLES(uart->hw_base)      = 1;    /* Enable UART1 */
52         AUX_MU_IER_REG(uart->hw_base)   = 0;    /* Disable interrupt */
53         AUX_MU_CNTL_REG(uart->hw_base)  = 0;    /* Disable Transmitter and Receiver */
54         AUX_MU_LCR_REG(uart->hw_base)   = 3;    /* Works in 8-bit mode */
55         AUX_MU_MCR_REG(uart->hw_base)   = 0;    /* Disable RTS */
56         AUX_MU_IIR_REG(uart->hw_base)   = 0xC6; /* Enable FIFO, Clear FIFO */
57         AUX_MU_BAUD_REG(uart->hw_base)  = 270;  /* 115200 = system clock 250MHz / (8 * (baud + 1)), baud = 270 */
58         AUX_MU_CNTL_REG(uart->hw_base)  = 3;    /* Enable Transmitter and Receiver */
59     }
60 
61     return RT_EOK;
62 }
63 
uart_control(struct rt_serial_device * serial,int cmd,void * arg)64 static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
65 {
66     struct hw_uart_device *uart;
67 
68     RT_ASSERT(serial != RT_NULL);
69     uart = (struct hw_uart_device *)serial->parent.user_data;
70 
71     switch (cmd)
72     {
73     case RT_DEVICE_CTRL_CLR_INT:
74         /* disable rx irq */
75         AUX_MU_IER_REG(uart->hw_base) = 0x0;
76         rt_hw_interrupt_mask(uart->irqno);
77         break;
78 
79     case RT_DEVICE_CTRL_SET_INT:
80         /* enable rx irq */
81         AUX_MU_IER_REG(uart->hw_base) = 0x1;
82         rt_hw_interrupt_umask(uart->irqno);
83         break;
84     }
85 
86     return RT_EOK;
87 }
88 
uart_putc(struct rt_serial_device * serial,char c)89 static int uart_putc(struct rt_serial_device *serial, char c)
90 {
91     struct hw_uart_device *uart;
92 
93     RT_ASSERT(serial != RT_NULL);
94     uart = (struct hw_uart_device *)serial->parent.user_data;
95 
96     while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20));
97     AUX_MU_IO_REG(uart->hw_base) = c;
98 
99     return 1;
100 }
101 
uart_getc(struct rt_serial_device * serial)102 static int uart_getc(struct rt_serial_device *serial)
103 {
104     int ch = -1;
105     struct hw_uart_device *uart;
106 
107     RT_ASSERT(serial != RT_NULL);
108     uart = (struct hw_uart_device *)serial->parent.user_data;
109 
110     if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01))
111     {
112         ch = AUX_MU_IO_REG(uart->hw_base) & 0xff;
113     }
114 
115     return ch;
116 }
117 
118 static const struct rt_uart_ops _uart_ops =
119 {
120     uart_configure,
121     uart_control,
122     uart_putc,
123     uart_getc,
124 };
125 
rt_hw_uart_isr(int irqno,void * param)126 static void rt_hw_uart_isr(int irqno, void *param)
127 {
128     struct rt_serial_device *serial = (struct rt_serial_device*)param;
129     rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
130 }
131 
132 #ifdef RT_USING_UART0
133 /* UART device driver structure */
134 static struct hw_uart_device _uart0_device =
135 {
136     RPI_UART0_BASE,
137     IRQ_PBA8_UART0,
138 };
139 static struct rt_serial_device _serial0;
140 #endif
141 
142 #ifdef RT_USING_UART1
143 /* UART1 device driver structure */
144 static struct hw_uart_device _uart1_device =
145 {
146     AUX_BASE,
147     IRQ_AUX,
148 };
149 static struct rt_serial_device _serial1;
150 #endif
151 
rt_hw_uart_init(void)152 int rt_hw_uart_init(void)
153 {
154     struct hw_uart_device *uart;
155     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
156 
157 #ifdef RT_USING_UART0
158     uart = &_uart0_device;
159 
160     _serial0.ops    = &_uart_ops;
161     _serial0.config = config;
162 
163     /* register UART1 device */
164     rt_hw_serial_register(&_serial0, "uart0",
165                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
166                           uart);
167     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial0, "uart0");
168 #endif
169 
170 #ifdef RT_USING_UART1
171     uart = &_uart1_device;
172     _serial1.ops = &_uart_ops;
173     _serial1.config = config;
174 
175     /* register UART1 device */
176     rt_hw_serial_register(&_serial1, "uart1",
177                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
178     /* enable Rx and Tx of UART */
179     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial1, "uart1");
180 #endif
181 
182     return 0;
183 }
184