1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2020-06-16 bigmagic first version 9 */ 10 #ifndef __DRV_SPI_H__ 11 #define __DRV_SPI_H__ 12 13 #include "drv_gpio.h" 14 15 #define SPI_REG_CS(BASE) HWREG32(BASE + 0x00) 16 #define SPI_REG_FIFO(BASE) HWREG32(BASE + 0x04) 17 #define SPI_REG_CLK(BASE) HWREG32(BASE + 0x08) 18 #define SPI_REG_DLEN(BASE) HWREG32(BASE + 0x0C) 19 #define SPI_REG_LTOH(BASE) HWREG32(BASE + 0x10) 20 #define SPI_REG_DC(BASE) HWREG32(BASE + 0x14) 21 22 /* CS Register */ 23 #define SPI_CS_LOSSI_LONG_32BIT (1 << 25) 24 #define SPI_CS_LOSSI_DMA_MODE (1 << 24) 25 #define SPI_CS_CSPOL2 (1 << 23) 26 #define SPI_CS_CSPOL1 (1 << 22) 27 #define SPI_CS_CSPOL0 (1 << 21) 28 #define SPI_CS_RX_FIFO_FULL (1 << 20) 29 #define SPI_CS_RX_FIFO_3_QUARTER (1 << 19) 30 #define SPI_CS_TX_DATA (1 << 18) 31 #define SPI_CS_RX_DATA (1 << 17) 32 #define SPI_CS_DONE (1 << 16) 33 #define SPI_CS_LOSSI_EN (1 << 13) 34 #define SPI_CS_READ_EN (1 << 12) 35 #define SPI_CS_AUTO_CS (1 << 11) 36 #define SPI_CS_INTR_RXR (1 << 10) 37 #define SPI_CS_INTR_DONE (1 << 9) 38 #define SPI_CS_DMA_EN (1 << 8) 39 #define SPI_CS_TA (1 << 7) 40 #define SPI_CS_CSPOL_HIGH (1 << 6) 41 #define SPI_CS_CLEAR_RX (2 << 4) 42 #define SPI_CS_CLEAR_TX (1 << 4) 43 #define SPI_CS_CPOL (1 << 3) 44 #define SPI_CS_CPHA (1 << 2) 45 #define SPI_CS_CHIP_SELECT_2 (2 << 0) 46 #define SPI_CS_CHIP_SELECT_1 (1 << 0) 47 #define SPI_CS_CHIP_SELECT_0 (0 << 0) 48 49 struct raspi_spi_hw_config 50 { 51 rt_uint8_t spi_num; 52 GPIO_PIN sclk_pin; 53 GPIO_FUNC sclk_mode; 54 GPIO_PIN mosi_pin; 55 GPIO_FUNC mosi_mode; 56 GPIO_PIN miso_pin; 57 GPIO_FUNC miso_mode; 58 #if defined (BSP_USING_SPI0_DEVICE0) || defined (BSP_USING_SPI1_DEVICE0) 59 GPIO_PIN ce0_pin; 60 GPIO_FUNC ce0_mode; 61 #endif 62 63 #if defined (BSP_USING_SPI0_DEVICE1) || defined (BSP_USING_SPI1_DEVICE1) 64 GPIO_PIN ce1_pin; 65 GPIO_FUNC ce1_mode; 66 #endif 67 68 #if defined (BSP_USING_SPI1_DEVICE2) 69 GPIO_PIN ce2_pin; 70 GPIO_FUNC ce2_mode; 71 #endif 72 rt_ubase_t hw_base; 73 74 }; 75 76 struct raspi_spi_device 77 { 78 char *device_name; 79 struct rt_spi_bus *spi_bus; 80 struct rt_spi_device *spi_device; 81 struct raspi_spi_hw_config *spi_hw_config; 82 GPIO_PIN cs_pin; 83 }; 84 85 int rt_hw_spi_init(void); 86 87 #endif 88