1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2021-01-28 flybreak first version
9 */
10
11 #include "drv_gpio.h"
12 #include <hardware/gpio.h>
13 #include <hardware/platform_defs.h>
14
pico_pin_mode(struct rt_device * dev,rt_base_t pin,rt_uint8_t mode)15 static void pico_pin_mode(struct rt_device *dev, rt_base_t pin, rt_uint8_t mode)
16 {
17 RT_ASSERT((0 <= pin) && (pin < NUM_BANK0_GPIOS));
18
19 gpio_init(pin);
20 switch (mode)
21 {
22 case PIN_MODE_OUTPUT:
23 gpio_set_dir(pin, GPIO_OUT);
24 break;
25 case PIN_MODE_INPUT:
26 gpio_set_dir(pin, GPIO_IN);
27 break;
28 case PIN_MODE_INPUT_PULLUP:
29 gpio_pull_up(pin);
30 break;
31 case PIN_MODE_INPUT_PULLDOWN:
32 gpio_pull_down(pin);
33 break;
34 case PIN_MODE_OUTPUT_OD:
35 gpio_disable_pulls(pin);
36 break;
37 }
38 }
39
pico_pin_write(struct rt_device * dev,rt_base_t pin,rt_uint8_t value)40 static void pico_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t value)
41 {
42 RT_ASSERT((0 <= pin) && (pin < NUM_BANK0_GPIOS));
43 gpio_put(pin, value);
44 }
45
pico_pin_read(struct rt_device * device,rt_base_t pin)46 static rt_ssize_t pico_pin_read(struct rt_device *device, rt_base_t pin)
47 {
48 RT_ASSERT((0 <= pin) && (pin < NUM_BANK0_GPIOS));
49 return (gpio_get(pin)? PIN_HIGH : PIN_LOW);
50 }
51
52 static const struct rt_pin_ops ops =
53 {
54 pico_pin_mode,
55 pico_pin_write,
56 pico_pin_read,
57 RT_NULL,
58 RT_NULL,
59 RT_NULL,
60 RT_NULL,
61 };
62
rt_hw_gpio_init(void)63 int rt_hw_gpio_init(void)
64 {
65 rt_device_pin_register("gpio", &ops, RT_NULL);
66
67 return 0;
68 }
69 INIT_DEVICE_EXPORT(rt_hw_gpio_init);
70