1 /* 2 * Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /*******************************************************************************************************************//** 8 * @addtogroup IOPORT 9 * @{ 10 **********************************************************************************************************************/ 11 12 #ifndef R_IOPORT_H 13 #define R_IOPORT_H 14 15 /*********************************************************************************************************************** 16 * Includes 17 **********************************************************************************************************************/ 18 #include "bsp_api.h" 19 20 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ 21 FSP_HEADER 22 23 #include "r_ioport_api.h" 24 #if __has_include("r_ioport_cfg.h") 25 #include "r_ioport_cfg.h" 26 #endif 27 28 /*********************************************************************************************************************** 29 * Macro definitions 30 **********************************************************************************************************************/ 31 32 /* Private definition to set enumeration values. */ 33 #define IOPORT_PRV_PFS_PSEL_OFFSET (24) 34 35 /*********************************************************************************************************************** 36 * Typedef definitions 37 **********************************************************************************************************************/ 38 39 /** IOPORT private control block. DO NOT MODIFY. Initialization occurs when R_IOPORT_Open() is called. */ 40 typedef struct st_ioport_instance_ctrl 41 { 42 uint32_t open; 43 void const * p_context; 44 } ioport_instance_ctrl_t; 45 46 /* This typedef is here temporarily. See SWFLEX-144 for details. */ 47 /** Superset list of all possible IO port pins. */ 48 typedef enum e_ioport_port_pin_t 49 { 50 IOPORT_PORT_00_PIN_00 = 0x0000, /* /< IO port 0 pin 0 */ 51 IOPORT_PORT_00_PIN_01 = 0x0001, /* /< IO port 0 pin 1 */ 52 IOPORT_PORT_00_PIN_02 = 0x0002, /* /< IO port 0 pin 2 */ 53 IOPORT_PORT_00_PIN_03 = 0x0003, /* /< IO port 0 pin 3 */ 54 IOPORT_PORT_00_PIN_04 = 0x0004, /* /< IO port 0 pin 4 */ 55 IOPORT_PORT_00_PIN_05 = 0x0005, /* /< IO port 0 pin 5 */ 56 IOPORT_PORT_00_PIN_06 = 0x0006, /* /< IO port 0 pin 6 */ 57 IOPORT_PORT_00_PIN_07 = 0x0007, /* /< IO port 0 pin 7 */ 58 IOPORT_PORT_00_PIN_08 = 0x0008, /* /< IO port 0 pin 8 */ 59 IOPORT_PORT_00_PIN_09 = 0x0009, /* /< IO port 0 pin 9 */ 60 IOPORT_PORT_00_PIN_10 = 0x000A, /* /< IO port 0 pin 10 */ 61 IOPORT_PORT_00_PIN_11 = 0x000B, /* /< IO port 0 pin 11 */ 62 IOPORT_PORT_00_PIN_12 = 0x000C, /* /< IO port 0 pin 12 */ 63 IOPORT_PORT_00_PIN_13 = 0x000D, /* /< IO port 0 pin 13 */ 64 IOPORT_PORT_00_PIN_14 = 0x000E, /* /< IO port 0 pin 14 */ 65 IOPORT_PORT_00_PIN_15 = 0x000F, /* /< IO port 0 pin 15 */ 66 67 IOPORT_PORT_01_PIN_00 = 0x0100, /* /< IO port 1 pin 0 */ 68 IOPORT_PORT_01_PIN_01 = 0x0101, /* /< IO port 1 pin 1 */ 69 IOPORT_PORT_01_PIN_02 = 0x0102, /* /< IO port 1 pin 2 */ 70 IOPORT_PORT_01_PIN_03 = 0x0103, /* /< IO port 1 pin 3 */ 71 IOPORT_PORT_01_PIN_04 = 0x0104, /* /< IO port 1 pin 4 */ 72 IOPORT_PORT_01_PIN_05 = 0x0105, /* /< IO port 1 pin 5 */ 73 IOPORT_PORT_01_PIN_06 = 0x0106, /* /< IO port 1 pin 6 */ 74 IOPORT_PORT_01_PIN_07 = 0x0107, /* /< IO port 1 pin 7 */ 75 IOPORT_PORT_01_PIN_08 = 0x0108, /* /< IO port 1 pin 8 */ 76 IOPORT_PORT_01_PIN_09 = 0x0109, /* /< IO port 1 pin 9 */ 77 IOPORT_PORT_01_PIN_10 = 0x010A, /* /< IO port 1 pin 10 */ 78 IOPORT_PORT_01_PIN_11 = 0x010B, /* /< IO port 1 pin 11 */ 79 IOPORT_PORT_01_PIN_12 = 0x010C, /* /< IO port 1 pin 12 */ 80 IOPORT_PORT_01_PIN_13 = 0x010D, /* /< IO port 1 pin 13 */ 81 IOPORT_PORT_01_PIN_14 = 0x010E, /* /< IO port 1 pin 14 */ 82 IOPORT_PORT_01_PIN_15 = 0x010F, /* /< IO port 1 pin 15 */ 83 84 IOPORT_PORT_02_PIN_00 = 0x0200, /* /< IO port 2 pin 0 */ 85 IOPORT_PORT_02_PIN_01 = 0x0201, /* /< IO port 2 pin 1 */ 86 IOPORT_PORT_02_PIN_02 = 0x0202, /* /< IO port 2 pin 2 */ 87 IOPORT_PORT_02_PIN_03 = 0x0203, /* /< IO port 2 pin 3 */ 88 IOPORT_PORT_02_PIN_04 = 0x0204, /* /< IO port 2 pin 4 */ 89 IOPORT_PORT_02_PIN_05 = 0x0205, /* /< IO port 2 pin 5 */ 90 IOPORT_PORT_02_PIN_06 = 0x0206, /* /< IO port 2 pin 6 */ 91 IOPORT_PORT_02_PIN_07 = 0x0207, /* /< IO port 2 pin 7 */ 92 IOPORT_PORT_02_PIN_08 = 0x0208, /* /< IO port 2 pin 8 */ 93 IOPORT_PORT_02_PIN_09 = 0x0209, /* /< IO port 2 pin 9 */ 94 IOPORT_PORT_02_PIN_10 = 0x020A, /* /< IO port 2 pin 10 */ 95 IOPORT_PORT_02_PIN_11 = 0x020B, /* /< IO port 2 pin 11 */ 96 IOPORT_PORT_02_PIN_12 = 0x020C, /* /< IO port 2 pin 12 */ 97 IOPORT_PORT_02_PIN_13 = 0x020D, /* /< IO port 2 pin 13 */ 98 IOPORT_PORT_02_PIN_14 = 0x020E, /* /< IO port 2 pin 14 */ 99 IOPORT_PORT_02_PIN_15 = 0x020F, /* /< IO port 2 pin 15 */ 100 101 IOPORT_PORT_03_PIN_00 = 0x0300, /* /< IO port 3 pin 0 */ 102 IOPORT_PORT_03_PIN_01 = 0x0301, /* /< IO port 3 pin 1 */ 103 IOPORT_PORT_03_PIN_02 = 0x0302, /* /< IO port 3 pin 2 */ 104 IOPORT_PORT_03_PIN_03 = 0x0303, /* /< IO port 3 pin 3 */ 105 IOPORT_PORT_03_PIN_04 = 0x0304, /* /< IO port 3 pin 4 */ 106 IOPORT_PORT_03_PIN_05 = 0x0305, /* /< IO port 3 pin 5 */ 107 IOPORT_PORT_03_PIN_06 = 0x0306, /* /< IO port 3 pin 6 */ 108 IOPORT_PORT_03_PIN_07 = 0x0307, /* /< IO port 3 pin 7 */ 109 IOPORT_PORT_03_PIN_08 = 0x0308, /* /< IO port 3 pin 8 */ 110 IOPORT_PORT_03_PIN_09 = 0x0309, /* /< IO port 3 pin 9 */ 111 IOPORT_PORT_03_PIN_10 = 0x030A, /* /< IO port 3 pin 10 */ 112 IOPORT_PORT_03_PIN_11 = 0x030B, /* /< IO port 3 pin 11 */ 113 IOPORT_PORT_03_PIN_12 = 0x030C, /* /< IO port 3 pin 12 */ 114 IOPORT_PORT_03_PIN_13 = 0x030D, /* /< IO port 3 pin 13 */ 115 IOPORT_PORT_03_PIN_14 = 0x030E, /* /< IO port 3 pin 14 */ 116 IOPORT_PORT_03_PIN_15 = 0x030F, /* /< IO port 3 pin 15 */ 117 118 IOPORT_PORT_04_PIN_00 = 0x0400, /* /< IO port 4 pin 0 */ 119 IOPORT_PORT_04_PIN_01 = 0x0401, /* /< IO port 4 pin 1 */ 120 IOPORT_PORT_04_PIN_02 = 0x0402, /* /< IO port 4 pin 2 */ 121 IOPORT_PORT_04_PIN_03 = 0x0403, /* /< IO port 4 pin 3 */ 122 IOPORT_PORT_04_PIN_04 = 0x0404, /* /< IO port 4 pin 4 */ 123 IOPORT_PORT_04_PIN_05 = 0x0405, /* /< IO port 4 pin 5 */ 124 IOPORT_PORT_04_PIN_06 = 0x0406, /* /< IO port 4 pin 6 */ 125 IOPORT_PORT_04_PIN_07 = 0x0407, /* /< IO port 4 pin 7 */ 126 IOPORT_PORT_04_PIN_08 = 0x0408, /* /< IO port 4 pin 8 */ 127 IOPORT_PORT_04_PIN_09 = 0x0409, /* /< IO port 4 pin 9 */ 128 IOPORT_PORT_04_PIN_10 = 0x040A, /* /< IO port 4 pin 10 */ 129 IOPORT_PORT_04_PIN_11 = 0x040B, /* /< IO port 4 pin 11 */ 130 IOPORT_PORT_04_PIN_12 = 0x040C, /* /< IO port 4 pin 12 */ 131 IOPORT_PORT_04_PIN_13 = 0x040D, /* /< IO port 4 pin 13 */ 132 IOPORT_PORT_04_PIN_14 = 0x040E, /* /< IO port 4 pin 14 */ 133 IOPORT_PORT_04_PIN_15 = 0x040F, /* /< IO port 4 pin 15 */ 134 135 IOPORT_PORT_05_PIN_00 = 0x0500, /* /< IO port 5 pin 0 */ 136 IOPORT_PORT_05_PIN_01 = 0x0501, /* /< IO port 5 pin 1 */ 137 IOPORT_PORT_05_PIN_02 = 0x0502, /* /< IO port 5 pin 2 */ 138 IOPORT_PORT_05_PIN_03 = 0x0503, /* /< IO port 5 pin 3 */ 139 IOPORT_PORT_05_PIN_04 = 0x0504, /* /< IO port 5 pin 4 */ 140 IOPORT_PORT_05_PIN_05 = 0x0505, /* /< IO port 5 pin 5 */ 141 IOPORT_PORT_05_PIN_06 = 0x0506, /* /< IO port 5 pin 6 */ 142 IOPORT_PORT_05_PIN_07 = 0x0507, /* /< IO port 5 pin 7 */ 143 IOPORT_PORT_05_PIN_08 = 0x0508, /* /< IO port 5 pin 8 */ 144 IOPORT_PORT_05_PIN_09 = 0x0509, /* /< IO port 5 pin 9 */ 145 IOPORT_PORT_05_PIN_10 = 0x050A, /* /< IO port 5 pin 10 */ 146 IOPORT_PORT_05_PIN_11 = 0x050B, /* /< IO port 5 pin 11 */ 147 IOPORT_PORT_05_PIN_12 = 0x050C, /* /< IO port 5 pin 12 */ 148 IOPORT_PORT_05_PIN_13 = 0x050D, /* /< IO port 5 pin 13 */ 149 IOPORT_PORT_05_PIN_14 = 0x050E, /* /< IO port 5 pin 14 */ 150 IOPORT_PORT_05_PIN_15 = 0x050F, /* /< IO port 5 pin 15 */ 151 152 IOPORT_PORT_06_PIN_00 = 0x0600, /* /< IO port 6 pin 0 */ 153 IOPORT_PORT_06_PIN_01 = 0x0601, /* /< IO port 6 pin 1 */ 154 IOPORT_PORT_06_PIN_02 = 0x0602, /* /< IO port 6 pin 2 */ 155 IOPORT_PORT_06_PIN_03 = 0x0603, /* /< IO port 6 pin 3 */ 156 IOPORT_PORT_06_PIN_04 = 0x0604, /* /< IO port 6 pin 4 */ 157 IOPORT_PORT_06_PIN_05 = 0x0605, /* /< IO port 6 pin 5 */ 158 IOPORT_PORT_06_PIN_06 = 0x0606, /* /< IO port 6 pin 6 */ 159 IOPORT_PORT_06_PIN_07 = 0x0607, /* /< IO port 6 pin 7 */ 160 IOPORT_PORT_06_PIN_08 = 0x0608, /* /< IO port 6 pin 8 */ 161 IOPORT_PORT_06_PIN_09 = 0x0609, /* /< IO port 6 pin 9 */ 162 IOPORT_PORT_06_PIN_10 = 0x060A, /* /< IO port 6 pin 10 */ 163 IOPORT_PORT_06_PIN_11 = 0x060B, /* /< IO port 6 pin 11 */ 164 IOPORT_PORT_06_PIN_12 = 0x060C, /* /< IO port 6 pin 12 */ 165 IOPORT_PORT_06_PIN_13 = 0x060D, /* /< IO port 6 pin 13 */ 166 IOPORT_PORT_06_PIN_14 = 0x060E, /* /< IO port 6 pin 14 */ 167 IOPORT_PORT_06_PIN_15 = 0x060F, /* /< IO port 6 pin 15 */ 168 169 IOPORT_PORT_07_PIN_00 = 0x0700, /* /< IO port 7 pin 0 */ 170 IOPORT_PORT_07_PIN_01 = 0x0701, /* /< IO port 7 pin 1 */ 171 IOPORT_PORT_07_PIN_02 = 0x0702, /* /< IO port 7 pin 2 */ 172 IOPORT_PORT_07_PIN_03 = 0x0703, /* /< IO port 7 pin 3 */ 173 IOPORT_PORT_07_PIN_04 = 0x0704, /* /< IO port 7 pin 4 */ 174 IOPORT_PORT_07_PIN_05 = 0x0705, /* /< IO port 7 pin 5 */ 175 IOPORT_PORT_07_PIN_06 = 0x0706, /* /< IO port 7 pin 6 */ 176 IOPORT_PORT_07_PIN_07 = 0x0707, /* /< IO port 7 pin 7 */ 177 IOPORT_PORT_07_PIN_08 = 0x0708, /* /< IO port 7 pin 8 */ 178 IOPORT_PORT_07_PIN_09 = 0x0709, /* /< IO port 7 pin 9 */ 179 IOPORT_PORT_07_PIN_10 = 0x070A, /* /< IO port 7 pin 10 */ 180 IOPORT_PORT_07_PIN_11 = 0x070B, /* /< IO port 7 pin 11 */ 181 IOPORT_PORT_07_PIN_12 = 0x070C, /* /< IO port 7 pin 12 */ 182 IOPORT_PORT_07_PIN_13 = 0x070D, /* /< IO port 7 pin 13 */ 183 IOPORT_PORT_07_PIN_14 = 0x070E, /* /< IO port 7 pin 14 */ 184 IOPORT_PORT_07_PIN_15 = 0x070F, /* /< IO port 7 pin 15 */ 185 186 IOPORT_PORT_08_PIN_00 = 0x0800, /* /< IO port 8 pin 0 */ 187 IOPORT_PORT_08_PIN_01 = 0x0801, /* /< IO port 8 pin 1 */ 188 IOPORT_PORT_08_PIN_02 = 0x0802, /* /< IO port 8 pin 2 */ 189 IOPORT_PORT_08_PIN_03 = 0x0803, /* /< IO port 8 pin 3 */ 190 IOPORT_PORT_08_PIN_04 = 0x0804, /* /< IO port 8 pin 4 */ 191 IOPORT_PORT_08_PIN_05 = 0x0805, /* /< IO port 8 pin 5 */ 192 IOPORT_PORT_08_PIN_06 = 0x0806, /* /< IO port 8 pin 6 */ 193 IOPORT_PORT_08_PIN_07 = 0x0807, /* /< IO port 8 pin 7 */ 194 IOPORT_PORT_08_PIN_08 = 0x0808, /* /< IO port 8 pin 8 */ 195 IOPORT_PORT_08_PIN_09 = 0x0809, /* /< IO port 8 pin 9 */ 196 IOPORT_PORT_08_PIN_10 = 0x080A, /* /< IO port 8 pin 10 */ 197 IOPORT_PORT_08_PIN_11 = 0x080B, /* /< IO port 8 pin 11 */ 198 IOPORT_PORT_08_PIN_12 = 0x080C, /* /< IO port 8 pin 12 */ 199 IOPORT_PORT_08_PIN_13 = 0x080D, /* /< IO port 8 pin 13 */ 200 IOPORT_PORT_08_PIN_14 = 0x080E, /* /< IO port 8 pin 14 */ 201 IOPORT_PORT_08_PIN_15 = 0x080F, /* /< IO port 8 pin 15 */ 202 203 IOPORT_PORT_09_PIN_00 = 0x0900, /* /< IO port 9 pin 0 */ 204 IOPORT_PORT_09_PIN_01 = 0x0901, /* /< IO port 9 pin 1 */ 205 IOPORT_PORT_09_PIN_02 = 0x0902, /* /< IO port 9 pin 2 */ 206 IOPORT_PORT_09_PIN_03 = 0x0903, /* /< IO port 9 pin 3 */ 207 IOPORT_PORT_09_PIN_04 = 0x0904, /* /< IO port 9 pin 4 */ 208 IOPORT_PORT_09_PIN_05 = 0x0905, /* /< IO port 9 pin 5 */ 209 IOPORT_PORT_09_PIN_06 = 0x0906, /* /< IO port 9 pin 6 */ 210 IOPORT_PORT_09_PIN_07 = 0x0907, /* /< IO port 9 pin 7 */ 211 IOPORT_PORT_09_PIN_08 = 0x0908, /* /< IO port 9 pin 8 */ 212 IOPORT_PORT_09_PIN_09 = 0x0909, /* /< IO port 9 pin 9 */ 213 IOPORT_PORT_09_PIN_10 = 0x090A, /* /< IO port 9 pin 10 */ 214 IOPORT_PORT_09_PIN_11 = 0x090B, /* /< IO port 9 pin 11 */ 215 IOPORT_PORT_09_PIN_12 = 0x090C, /* /< IO port 9 pin 12 */ 216 IOPORT_PORT_09_PIN_13 = 0x090D, /* /< IO port 9 pin 13 */ 217 IOPORT_PORT_09_PIN_14 = 0x090E, /* /< IO port 9 pin 14 */ 218 IOPORT_PORT_09_PIN_15 = 0x090F, /* /< IO port 9 pin 15 */ 219 220 IOPORT_PORT_10_PIN_00 = 0x0A00, /* /< IO port 10 pin 0 */ 221 IOPORT_PORT_10_PIN_01 = 0x0A01, /* /< IO port 10 pin 1 */ 222 IOPORT_PORT_10_PIN_02 = 0x0A02, /* /< IO port 10 pin 2 */ 223 IOPORT_PORT_10_PIN_03 = 0x0A03, /* /< IO port 10 pin 3 */ 224 IOPORT_PORT_10_PIN_04 = 0x0A04, /* /< IO port 10 pin 4 */ 225 IOPORT_PORT_10_PIN_05 = 0x0A05, /* /< IO port 10 pin 5 */ 226 IOPORT_PORT_10_PIN_06 = 0x0A06, /* /< IO port 10 pin 6 */ 227 IOPORT_PORT_10_PIN_07 = 0x0A07, /* /< IO port 10 pin 7 */ 228 IOPORT_PORT_10_PIN_08 = 0x0A08, /* /< IO port 10 pin 8 */ 229 IOPORT_PORT_10_PIN_09 = 0x0A09, /* /< IO port 10 pin 9 */ 230 IOPORT_PORT_10_PIN_10 = 0x0A0A, /* /< IO port 10 pin 10 */ 231 IOPORT_PORT_10_PIN_11 = 0x0A0B, /* /< IO port 10 pin 11 */ 232 IOPORT_PORT_10_PIN_12 = 0x0A0C, /* /< IO port 10 pin 12 */ 233 IOPORT_PORT_10_PIN_13 = 0x0A0D, /* /< IO port 10 pin 13 */ 234 IOPORT_PORT_10_PIN_14 = 0x0A0E, /* /< IO port 10 pin 14 */ 235 IOPORT_PORT_10_PIN_15 = 0x0A0F, /* /< IO port 10 pin 15 */ 236 237 IOPORT_PORT_11_PIN_00 = 0x0B00, /* /< IO port 11 pin 0 */ 238 IOPORT_PORT_11_PIN_01 = 0x0B01, /* /< IO port 11 pin 1 */ 239 IOPORT_PORT_11_PIN_02 = 0x0B02, /* /< IO port 11 pin 2 */ 240 IOPORT_PORT_11_PIN_03 = 0x0B03, /* /< IO port 11 pin 3 */ 241 IOPORT_PORT_11_PIN_04 = 0x0B04, /* /< IO port 11 pin 4 */ 242 IOPORT_PORT_11_PIN_05 = 0x0B05, /* /< IO port 11 pin 5 */ 243 IOPORT_PORT_11_PIN_06 = 0x0B06, /* /< IO port 11 pin 6 */ 244 IOPORT_PORT_11_PIN_07 = 0x0B07, /* /< IO port 11 pin 7 */ 245 IOPORT_PORT_11_PIN_08 = 0x0B08, /* /< IO port 11 pin 8 */ 246 IOPORT_PORT_11_PIN_09 = 0x0B09, /* /< IO port 11 pin 9 */ 247 IOPORT_PORT_11_PIN_10 = 0x0B0A, /* /< IO port 11 pin 10 */ 248 IOPORT_PORT_11_PIN_11 = 0x0B0B, /* /< IO port 11 pin 11 */ 249 IOPORT_PORT_11_PIN_12 = 0x0B0C, /* /< IO port 11 pin 12 */ 250 IOPORT_PORT_11_PIN_13 = 0x0B0D, /* /< IO port 11 pin 13 */ 251 IOPORT_PORT_11_PIN_14 = 0x0B0E, /* /< IO port 11 pin 14 */ 252 IOPORT_PORT_11_PIN_15 = 0x0B0F, /* /< IO port 11 pin 15 */ 253 254 IOPORT_PORT_12_PIN_00 = 0x0C00, /* /< IO port 12 pin 0 */ 255 IOPORT_PORT_12_PIN_01 = 0x0C01, /* /< IO port 12 pin 1 */ 256 IOPORT_PORT_12_PIN_02 = 0x0C02, /* /< IO port 12 pin 2 */ 257 IOPORT_PORT_12_PIN_03 = 0x0C03, /* /< IO port 12 pin 3 */ 258 IOPORT_PORT_12_PIN_04 = 0x0C04, /* /< IO port 12 pin 4 */ 259 IOPORT_PORT_12_PIN_05 = 0x0C05, /* /< IO port 12 pin 5 */ 260 IOPORT_PORT_12_PIN_06 = 0x0C06, /* /< IO port 12 pin 6 */ 261 IOPORT_PORT_12_PIN_07 = 0x0C07, /* /< IO port 12 pin 7 */ 262 IOPORT_PORT_12_PIN_08 = 0x0C08, /* /< IO port 12 pin 8 */ 263 IOPORT_PORT_12_PIN_09 = 0x0C09, /* /< IO port 12 pin 9 */ 264 IOPORT_PORT_12_PIN_10 = 0x0C0A, /* /< IO port 12 pin 10 */ 265 IOPORT_PORT_12_PIN_11 = 0x0C0B, /* /< IO port 12 pin 11 */ 266 IOPORT_PORT_12_PIN_12 = 0x0C0C, /* /< IO port 12 pin 12 */ 267 IOPORT_PORT_12_PIN_13 = 0x0C0D, /* /< IO port 12 pin 13 */ 268 IOPORT_PORT_12_PIN_14 = 0x0C0E, /* /< IO port 12 pin 14 */ 269 IOPORT_PORT_12_PIN_15 = 0x0C0F, /* /< IO port 12 pin 15 */ 270 271 IOPORT_PORT_13_PIN_00 = 0x0D00, /* /< IO port 13 pin 0 */ 272 IOPORT_PORT_13_PIN_01 = 0x0D01, /* /< IO port 13 pin 1 */ 273 IOPORT_PORT_13_PIN_02 = 0x0D02, /* /< IO port 13 pin 2 */ 274 IOPORT_PORT_13_PIN_03 = 0x0D03, /* /< IO port 13 pin 3 */ 275 IOPORT_PORT_13_PIN_04 = 0x0D04, /* /< IO port 13 pin 4 */ 276 IOPORT_PORT_13_PIN_05 = 0x0D05, /* /< IO port 13 pin 5 */ 277 IOPORT_PORT_13_PIN_06 = 0x0D06, /* /< IO port 13 pin 6 */ 278 IOPORT_PORT_13_PIN_07 = 0x0D07, /* /< IO port 13 pin 7 */ 279 IOPORT_PORT_13_PIN_08 = 0x0D08, /* /< IO port 13 pin 8 */ 280 IOPORT_PORT_13_PIN_09 = 0x0D09, /* /< IO port 13 pin 9 */ 281 IOPORT_PORT_13_PIN_10 = 0x0D0A, /* /< IO port 13 pin 10 */ 282 IOPORT_PORT_13_PIN_11 = 0x0D0B, /* /< IO port 13 pin 11 */ 283 IOPORT_PORT_13_PIN_12 = 0x0D0C, /* /< IO port 13 pin 12 */ 284 IOPORT_PORT_13_PIN_13 = 0x0D0D, /* /< IO port 13 pin 13 */ 285 IOPORT_PORT_13_PIN_14 = 0x0D0E, /* /< IO port 13 pin 14 */ 286 IOPORT_PORT_13_PIN_15 = 0x0D0F, /* /< IO port 13 pin 15 */ 287 288 IOPORT_PORT_14_PIN_00 = 0x0E00, /* /< IO port 14 pin 0 */ 289 IOPORT_PORT_14_PIN_01 = 0x0E01, /* /< IO port 14 pin 1 */ 290 IOPORT_PORT_14_PIN_02 = 0x0E02, /* /< IO port 14 pin 2 */ 291 IOPORT_PORT_14_PIN_03 = 0x0E03, /* /< IO port 14 pin 3 */ 292 IOPORT_PORT_14_PIN_04 = 0x0E04, /* /< IO port 14 pin 4 */ 293 IOPORT_PORT_14_PIN_05 = 0x0E05, /* /< IO port 14 pin 5 */ 294 IOPORT_PORT_14_PIN_06 = 0x0E06, /* /< IO port 14 pin 6 */ 295 IOPORT_PORT_14_PIN_07 = 0x0E07, /* /< IO port 14 pin 7 */ 296 IOPORT_PORT_14_PIN_08 = 0x0E08, /* /< IO port 14 pin 8 */ 297 IOPORT_PORT_14_PIN_09 = 0x0E09, /* /< IO port 14 pin 9 */ 298 IOPORT_PORT_14_PIN_10 = 0x0E0A, /* /< IO port 14 pin 10 */ 299 IOPORT_PORT_14_PIN_11 = 0x0E0B, /* /< IO port 14 pin 11 */ 300 IOPORT_PORT_14_PIN_12 = 0x0E0C, /* /< IO port 14 pin 12 */ 301 IOPORT_PORT_14_PIN_13 = 0x0E0D, /* /< IO port 14 pin 13 */ 302 IOPORT_PORT_14_PIN_14 = 0x0E0E, /* /< IO port 14 pin 14 */ 303 IOPORT_PORT_14_PIN_15 = 0x0E0F, /* /< IO port 14 pin 15 */ 304 } ioport_port_pin_t; 305 306 #ifndef BSP_OVERRIDE_IOPORT_PERIPHERAL_T 307 308 /** Superset of all peripheral functions. */ 309 typedef enum e_ioport_peripheral 310 { 311 /** Pin will functions as an IO pin */ 312 IOPORT_PERIPHERAL_IO = 0x00, 313 314 /** Pin will function as a DEBUG pin */ 315 IOPORT_PERIPHERAL_DEBUG = (0x00UL << IOPORT_PRV_PFS_PSEL_OFFSET), 316 317 /** Pin will function as an AGT peripheral pin */ 318 IOPORT_PERIPHERAL_AGT = (0x01UL << IOPORT_PRV_PFS_PSEL_OFFSET), 319 320 /** Pin will function as an AGT peripheral pin */ 321 IOPORT_PERIPHERAL_AGTW = (0x01UL << IOPORT_PRV_PFS_PSEL_OFFSET), 322 323 /** Pin will function as an AGT peripheral pin */ 324 IOPORT_PERIPHERAL_AGT1 = (0x18UL << IOPORT_PRV_PFS_PSEL_OFFSET), 325 326 /** Pin will function as a GPT peripheral pin */ 327 IOPORT_PERIPHERAL_GPT0 = (0x02UL << IOPORT_PRV_PFS_PSEL_OFFSET), 328 329 /** Pin will function as a GPT peripheral pin */ 330 IOPORT_PERIPHERAL_GPT1 = (0x03UL << IOPORT_PRV_PFS_PSEL_OFFSET), 331 332 /** Pin will function as an SCI peripheral pin */ 333 IOPORT_PERIPHERAL_SCI0_2_4_6_8 = (0x04UL << IOPORT_PRV_PFS_PSEL_OFFSET), 334 335 /** Pin will function as an SCI peripheral pin */ 336 IOPORT_PERIPHERAL_SCI1_3_5_7_9 = (0x05UL << IOPORT_PRV_PFS_PSEL_OFFSET), 337 338 /** Pin will function as a SPI peripheral pin */ 339 IOPORT_PERIPHERAL_SPI = (0x06UL << IOPORT_PRV_PFS_PSEL_OFFSET), 340 341 /** Pin will function as a IIC peripheral pin */ 342 IOPORT_PERIPHERAL_IIC = (0x07UL << IOPORT_PRV_PFS_PSEL_OFFSET), 343 344 /** Pin will function as a KEY peripheral pin */ 345 IOPORT_PERIPHERAL_KEY = (0x08UL << IOPORT_PRV_PFS_PSEL_OFFSET), 346 347 /** Pin will function as a clock/comparator/RTC peripheral pin */ 348 IOPORT_PERIPHERAL_CLKOUT_COMP_RTC = (0x09UL << IOPORT_PRV_PFS_PSEL_OFFSET), 349 350 /** Pin will function as a CAC/ADC peripheral pin */ 351 IOPORT_PERIPHERAL_CAC_AD = (0x0AUL << IOPORT_PRV_PFS_PSEL_OFFSET), 352 353 /** Pin will function as a BUS peripheral pin */ 354 IOPORT_PERIPHERAL_BUS = (0x0BUL << IOPORT_PRV_PFS_PSEL_OFFSET), 355 356 /** Pin will function as a CTSU peripheral pin */ 357 IOPORT_PERIPHERAL_CTSU = (0x0CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 358 359 /** Pin will function as a CMPHS peripheral pin */ 360 IOPORT_PERIPHERAL_ACMPHS = (0x0CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 361 362 /** Pin will function as a segment LCD peripheral pin */ 363 IOPORT_PERIPHERAL_LCDC = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 364 365 #if BSP_FEATURE_SCI_UART_DE_IS_INVERTED 366 367 /** Pin will function as an SCI peripheral DEn pin */ 368 IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 369 370 /** Pin will function as an SCI DEn peripheral pin */ 371 IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 372 #else 373 374 /** Pin will function as an SCI peripheral DEn pin */ 375 IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 376 377 /** Pin will function as an SCI DEn peripheral pin */ 378 IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 379 #endif 380 381 /** Pin will function as a DALI peripheral pin */ 382 IOPORT_PERIPHERAL_DALI = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 383 384 /** Pin will function as a CEU peripheral pin */ 385 IOPORT_PERIPHERAL_CEU = (0x0FUL << IOPORT_PRV_PFS_PSEL_OFFSET), 386 387 /** Pin will function as a CAN peripheral pin */ 388 IOPORT_PERIPHERAL_CAN = (0x10UL << IOPORT_PRV_PFS_PSEL_OFFSET), 389 390 /** Pin will function as a QSPI peripheral pin */ 391 IOPORT_PERIPHERAL_QSPI = (0x11UL << IOPORT_PRV_PFS_PSEL_OFFSET), 392 393 /** Pin will function as an SSI peripheral pin */ 394 IOPORT_PERIPHERAL_SSI = (0x12UL << IOPORT_PRV_PFS_PSEL_OFFSET), 395 396 /** Pin will function as a USB full speed peripheral pin */ 397 IOPORT_PERIPHERAL_USB_FS = (0x13UL << IOPORT_PRV_PFS_PSEL_OFFSET), 398 399 /** Pin will function as a USB high speed peripheral pin */ 400 IOPORT_PERIPHERAL_USB_HS = (0x14UL << IOPORT_PRV_PFS_PSEL_OFFSET), 401 402 /** Pin will function as a GPT peripheral pin */ 403 IOPORT_PERIPHERAL_GPT2 = (0x14UL << IOPORT_PRV_PFS_PSEL_OFFSET), 404 405 /** Pin will function as an SD/MMC peripheral pin */ 406 IOPORT_PERIPHERAL_SDHI_MMC = (0x15UL << IOPORT_PRV_PFS_PSEL_OFFSET), 407 408 /** Pin will function as a GPT peripheral pin */ 409 IOPORT_PERIPHERAL_GPT3 = (0x15UL << IOPORT_PRV_PFS_PSEL_OFFSET), 410 411 /** Pin will function as an Ethernet MMI peripheral pin */ 412 IOPORT_PERIPHERAL_ETHER_MII = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), 413 414 /** Pin will function as a GPT peripheral pin */ 415 IOPORT_PERIPHERAL_GPT4 = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), 416 417 /** Pin will function as a GPT peripheral pin */ 418 IOPORT_PERIPHERAL_GPT5 = (0x1BUL << IOPORT_PRV_PFS_PSEL_OFFSET), 419 420 /** Pin will function as an Ethernet RMMI peripheral pin */ 421 IOPORT_PERIPHERAL_ETHER_RMII = (0x17UL << IOPORT_PRV_PFS_PSEL_OFFSET), 422 423 /** Pin will function as a PDC peripheral pin */ 424 IOPORT_PERIPHERAL_PDC = (0x18UL << IOPORT_PRV_PFS_PSEL_OFFSET), 425 426 /** Pin will function as a graphics LCD peripheral pin */ 427 IOPORT_PERIPHERAL_LCD_GRAPHICS = (0x19UL << IOPORT_PRV_PFS_PSEL_OFFSET), 428 429 /** Pin will function as a CAC peripheral pin */ 430 IOPORT_PERIPHERAL_CAC = (0x19UL << IOPORT_PRV_PFS_PSEL_OFFSET), 431 432 /** Pin will function as a debug trace peripheral pin */ 433 IOPORT_PERIPHERAL_TRACE = (0x1AUL << IOPORT_PRV_PFS_PSEL_OFFSET), 434 435 /** Pin will function as a OSPI peripheral pin */ 436 IOPORT_PERIPHERAL_OSPI = (0x1CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 437 438 /** Pin will function as a CEC peripheral pin */ 439 IOPORT_PERIPHERAL_CEC = (0x1DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 440 441 /** Pin will function as a PGAOUT peripheral pin */ 442 IOPORT_PERIPHERAL_PGAOUT0 = (0x1DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 443 444 /** Pin will function as a PGAOUT peripheral pin */ 445 IOPORT_PERIPHERAL_PGAOUT1 = (0x1EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 446 447 /** Pin will function as a ULPT peripheral pin */ 448 IOPORT_PERIPHERAL_ULPT = (0x1EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 449 450 /** Pin will function as a MIPI DSI peripheral pin */ 451 IOPORT_PERIPHERAL_MIPI = (0x1FUL << IOPORT_PRV_PFS_PSEL_OFFSET), 452 453 /** Pin will function as an UARTA peripheral pin */ 454 IOPORT_PERIPHERAL_UARTA = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), 455 } ioport_peripheral_t; 456 #endif 457 458 #ifndef BSP_OVERRIDE_IOPORT_CFG_OPTIONS_T 459 460 /** Options to configure pin functions */ 461 typedef enum e_ioport_cfg_options 462 { 463 IOPORT_CFG_PORT_DIRECTION_INPUT = 0x00000000, /* /< Sets the pin direction to input (default) */ 464 IOPORT_CFG_PORT_DIRECTION_OUTPUT = 0x00000004, /* /< Sets the pin direction to output */ 465 IOPORT_CFG_PORT_OUTPUT_LOW = 0x00000000, /* /< Sets the pin level to low */ 466 IOPORT_CFG_PORT_OUTPUT_HIGH = 0x00000001, /* /< Sets the pin level to high */ 467 IOPORT_CFG_PULLUP_ENABLE = 0x00000010, /* /< Enables the pin's internal pull-up */ 468 IOPORT_CFG_PIM_TTL = 0x00000020, /* /< Enables the pin's input mode */ 469 IOPORT_CFG_NMOS_ENABLE = 0x00000040, /* /< Enables the pin's NMOS open-drain output */ 470 IOPORT_CFG_PMOS_ENABLE = 0x00000080, /* /< Enables the pin's PMOS open-drain ouput */ 471 IOPORT_CFG_DRIVE_MID = 0x00000400, /* /< Sets pin drive output to medium */ 472 IOPORT_CFG_DRIVE_HS_HIGH = 0x00000800, /* /< Sets pin drive output to high along with supporting high speed */ 473 IOPORT_CFG_DRIVE_MID_IIC = 0x00000800, /* /< Sets pin to drive output needed for IIC on a 20mA port */ 474 IOPORT_CFG_DRIVE_HIGH = 0x00000C00, /* /< Sets pin drive output to high */ 475 IOPORT_CFG_EVENT_RISING_EDGE = 0x00001000, /* /< Sets pin event trigger to rising edge */ 476 IOPORT_CFG_EVENT_FALLING_EDGE = 0x00002000, /* /< Sets pin event trigger to falling edge */ 477 IOPORT_CFG_EVENT_BOTH_EDGES = 0x00003000, /* /< Sets pin event trigger to both edges */ 478 IOPORT_CFG_IRQ_ENABLE = 0x00004000, /* /< Sets pin as an IRQ pin */ 479 IOPORT_CFG_ANALOG_ENABLE = 0x00008000, /* /< Enables pin to operate as an analog pin */ 480 IOPORT_CFG_PERIPHERAL_PIN = 0x00010000 /* /< Enables pin to operate as a peripheral pin */ 481 } ioport_cfg_options_t; 482 #endif 483 484 /********************************************************************************************************************** 485 * Exported global variables 486 **********************************************************************************************************************/ 487 488 /** @cond INC_HEADER_DEFS_SEC */ 489 /** Filled in Interface API structure for this Instance. */ 490 extern const ioport_api_t g_ioport_on_ioport; 491 492 /** @endcond */ 493 494 /*********************************************************************************************************************** 495 * Public APIs 496 **********************************************************************************************************************/ 497 498 fsp_err_t R_IOPORT_Open(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg); 499 fsp_err_t R_IOPORT_Close(ioport_ctrl_t * const p_ctrl); 500 fsp_err_t R_IOPORT_PinsCfg(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg); 501 fsp_err_t R_IOPORT_PinCfg(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg); 502 fsp_err_t R_IOPORT_PinEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_event); 503 fsp_err_t R_IOPORT_PinEventOutputWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value); 504 fsp_err_t R_IOPORT_PinRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_value); 505 fsp_err_t R_IOPORT_PinWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level); 506 fsp_err_t R_IOPORT_PortDirectionSet(ioport_ctrl_t * const p_ctrl, 507 bsp_io_port_t port, 508 ioport_size_t direction_values, 509 ioport_size_t mask); 510 fsp_err_t R_IOPORT_PortEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * event_data); 511 fsp_err_t R_IOPORT_PortEventOutputWrite(ioport_ctrl_t * const p_ctrl, 512 bsp_io_port_t port, 513 ioport_size_t event_data, 514 ioport_size_t mask_value); 515 fsp_err_t R_IOPORT_PortRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_port_value); 516 fsp_err_t R_IOPORT_PortWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask); 517 518 /*******************************************************************************************************************//** 519 * @} (end defgroup IOPORT) 520 **********************************************************************************************************************/ 521 522 /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ 523 FSP_FOOTER 524 525 #endif /* R_IOPORT_H */ 526 527