1 /* generated pin source file - do not edit */
2 #include "bsp_api.h"
3 #include "r_ioport_api.h"
4
5
6 const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
7 {
8 .pin = BSP_IO_PORT_00_PIN_05,
9 .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE)
10 },
11 {
12 .pin = BSP_IO_PORT_00_PIN_07,
13 .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE)
14 },
15 {
16 .pin = BSP_IO_PORT_00_PIN_14,
17 .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE)
18 },
19 {
20 .pin = BSP_IO_PORT_01_PIN_08,
21 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_DEBUG)
22 },
23 {
24 .pin = BSP_IO_PORT_01_PIN_09,
25 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_DEBUG)
26 },
27 {
28 .pin = BSP_IO_PORT_01_PIN_10,
29 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_DEBUG)
30 },
31 {
32 .pin = BSP_IO_PORT_01_PIN_14,
33 .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_HIGH)
34 },
35 {
36 .pin = BSP_IO_PORT_02_PIN_05,
37 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)
38 },
39 {
40 .pin = BSP_IO_PORT_02_PIN_08,
41 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SDHI_MMC)
42 },
43 {
44 .pin = BSP_IO_PORT_02_PIN_10,
45 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SDHI_MMC)
46 },
47 {
48 .pin = BSP_IO_PORT_02_PIN_11,
49 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SDHI_MMC)
50 },
51 {
52 .pin = BSP_IO_PORT_02_PIN_14,
53 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SDHI_MMC)
54 },
55 {
56 .pin = BSP_IO_PORT_03_PIN_00,
57 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_DEBUG)
58 },
59 {
60 .pin = BSP_IO_PORT_03_PIN_01,
61 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI0_2_4_6_8)
62 },
63 {
64 .pin = BSP_IO_PORT_03_PIN_02,
65 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI0_2_4_6_8)
66 },
67 {
68 .pin = BSP_IO_PORT_03_PIN_04,
69 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI0_2_4_6_8)
70 },
71 {
72 .pin = BSP_IO_PORT_03_PIN_05,
73 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI0_2_4_6_8)
74 },
75 {
76 .pin = BSP_IO_PORT_04_PIN_02,
77 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SSI)
78 },
79 {
80 .pin = BSP_IO_PORT_04_PIN_03,
81 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SSI)
82 },
83 {
84 .pin = BSP_IO_PORT_04_PIN_04,
85 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SSI)
86 },
87 {
88 .pin = BSP_IO_PORT_04_PIN_05,
89 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SSI)
90 },
91 {
92 .pin = BSP_IO_PORT_04_PIN_06,
93 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SSI)
94 },
95 {
96 .pin = BSP_IO_PORT_04_PIN_07,
97 .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_MID | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_IIC)
98 },
99 {
100 .pin = BSP_IO_PORT_04_PIN_08,
101 .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_MID | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_IIC)
102 },
103 {
104 .pin = BSP_IO_PORT_04_PIN_15,
105 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)
106 },
107 {
108 .pin = BSP_IO_PORT_05_PIN_00,
109 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
110 },
111 {
112 .pin = BSP_IO_PORT_05_PIN_01,
113 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
114 },
115 {
116 .pin = BSP_IO_PORT_05_PIN_02,
117 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
118 },
119 {
120 .pin = BSP_IO_PORT_05_PIN_03,
121 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
122 },
123 {
124 .pin = BSP_IO_PORT_05_PIN_04,
125 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
126 },
127 {
128 .pin = BSP_IO_PORT_05_PIN_05,
129 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_QSPI)
130 },
131 {
132 .pin = BSP_IO_PORT_06_PIN_01,
133 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9)
134 },
135 {
136 .pin = BSP_IO_PORT_06_PIN_02,
137 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9)
138 },
139 };
140
141 const ioport_cfg_t g_bsp_pin_cfg = {
142 .number_of_pins = sizeof(g_bsp_pin_cfg_data)/sizeof(ioport_pin_cfg_t),
143 .p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
144 };
145
146 #if BSP_TZ_SECURE_BUILD
147
148 void R_BSP_PinCfgSecurityInit(void);
149
150 /* Initialize SAR registers for secure pins. */
R_BSP_PinCfgSecurityInit(void)151 void R_BSP_PinCfgSecurityInit(void)
152 {
153 #if (2U == BSP_FEATURE_IOPORT_VERSION)
154 uint32_t pmsar[BSP_FEATURE_BSP_NUM_PMSAR];
155 #else
156 uint16_t pmsar[BSP_FEATURE_BSP_NUM_PMSAR];
157 #endif
158 memset(pmsar, 0xFF, BSP_FEATURE_BSP_NUM_PMSAR * sizeof(R_PMISC->PMSAR[0]));
159
160
161 for(uint32_t i = 0; i < g_bsp_pin_cfg.number_of_pins; i++)
162 {
163 uint32_t port_pin = g_bsp_pin_cfg.p_pin_cfg_data[i].pin;
164 uint32_t port = port_pin >> 8U;
165 uint32_t pin = port_pin & 0xFFU;
166 pmsar[port] &= (uint16_t) ~(1U << pin);
167 }
168
169 for(uint32_t i = 0; i < BSP_FEATURE_BSP_NUM_PMSAR; i++)
170 {
171 #if (2U == BSP_FEATURE_IOPORT_VERSION)
172 R_PMISC->PMSAR[i].PMSAR = (uint16_t) pmsar[i];
173 #else
174 R_PMISC->PMSAR[i].PMSAR = pmsar[i];
175 #endif
176 }
177
178 }
179 #endif
180