1 /*********************************************************************************************************************** 2 * Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. 3 * 4 * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products 5 * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are 6 * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use 7 * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property 8 * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas 9 * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION 10 * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT 11 * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES 12 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR 13 * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM 14 * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION 15 * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, 16 * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, 17 * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY 18 * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. 19 **********************************************************************************************************************/ 20 21 /*******************************************************************************************************************//** 22 * @addtogroup IOPORT 23 * @{ 24 **********************************************************************************************************************/ 25 26 #ifndef R_IOPORT_H 27 #define R_IOPORT_H 28 29 /*********************************************************************************************************************** 30 * Includes 31 **********************************************************************************************************************/ 32 #include "bsp_api.h" 33 34 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ 35 FSP_HEADER 36 37 #include "r_ioport_api.h" 38 #if __has_include("r_ioport_cfg.h") 39 #include "r_ioport_cfg.h" 40 #endif 41 42 /*********************************************************************************************************************** 43 * Macro definitions 44 **********************************************************************************************************************/ 45 46 /* Private definition to set enumeration values. */ 47 #define IOPORT_PRV_PFS_PSEL_OFFSET (24) 48 49 /*********************************************************************************************************************** 50 * Typedef definitions 51 **********************************************************************************************************************/ 52 53 /** IOPORT private control block. DO NOT MODIFY. Initialization occurs when R_IOPORT_Open() is called. */ 54 typedef struct st_ioport_instance_ctrl 55 { 56 uint32_t open; 57 void const * p_context; 58 } ioport_instance_ctrl_t; 59 60 /* This typedef is here temporarily. See SWFLEX-144 for details. */ 61 /** Superset list of all possible IO port pins. */ 62 typedef enum e_ioport_port_pin_t 63 { 64 IOPORT_PORT_00_PIN_00 = 0x0000, ///< IO port 0 pin 0 65 IOPORT_PORT_00_PIN_01 = 0x0001, ///< IO port 0 pin 1 66 IOPORT_PORT_00_PIN_02 = 0x0002, ///< IO port 0 pin 2 67 IOPORT_PORT_00_PIN_03 = 0x0003, ///< IO port 0 pin 3 68 IOPORT_PORT_00_PIN_04 = 0x0004, ///< IO port 0 pin 4 69 IOPORT_PORT_00_PIN_05 = 0x0005, ///< IO port 0 pin 5 70 IOPORT_PORT_00_PIN_06 = 0x0006, ///< IO port 0 pin 6 71 IOPORT_PORT_00_PIN_07 = 0x0007, ///< IO port 0 pin 7 72 IOPORT_PORT_00_PIN_08 = 0x0008, ///< IO port 0 pin 8 73 IOPORT_PORT_00_PIN_09 = 0x0009, ///< IO port 0 pin 9 74 IOPORT_PORT_00_PIN_10 = 0x000A, ///< IO port 0 pin 10 75 IOPORT_PORT_00_PIN_11 = 0x000B, ///< IO port 0 pin 11 76 IOPORT_PORT_00_PIN_12 = 0x000C, ///< IO port 0 pin 12 77 IOPORT_PORT_00_PIN_13 = 0x000D, ///< IO port 0 pin 13 78 IOPORT_PORT_00_PIN_14 = 0x000E, ///< IO port 0 pin 14 79 IOPORT_PORT_00_PIN_15 = 0x000F, ///< IO port 0 pin 15 80 81 IOPORT_PORT_01_PIN_00 = 0x0100, ///< IO port 1 pin 0 82 IOPORT_PORT_01_PIN_01 = 0x0101, ///< IO port 1 pin 1 83 IOPORT_PORT_01_PIN_02 = 0x0102, ///< IO port 1 pin 2 84 IOPORT_PORT_01_PIN_03 = 0x0103, ///< IO port 1 pin 3 85 IOPORT_PORT_01_PIN_04 = 0x0104, ///< IO port 1 pin 4 86 IOPORT_PORT_01_PIN_05 = 0x0105, ///< IO port 1 pin 5 87 IOPORT_PORT_01_PIN_06 = 0x0106, ///< IO port 1 pin 6 88 IOPORT_PORT_01_PIN_07 = 0x0107, ///< IO port 1 pin 7 89 IOPORT_PORT_01_PIN_08 = 0x0108, ///< IO port 1 pin 8 90 IOPORT_PORT_01_PIN_09 = 0x0109, ///< IO port 1 pin 9 91 IOPORT_PORT_01_PIN_10 = 0x010A, ///< IO port 1 pin 10 92 IOPORT_PORT_01_PIN_11 = 0x010B, ///< IO port 1 pin 11 93 IOPORT_PORT_01_PIN_12 = 0x010C, ///< IO port 1 pin 12 94 IOPORT_PORT_01_PIN_13 = 0x010D, ///< IO port 1 pin 13 95 IOPORT_PORT_01_PIN_14 = 0x010E, ///< IO port 1 pin 14 96 IOPORT_PORT_01_PIN_15 = 0x010F, ///< IO port 1 pin 15 97 98 IOPORT_PORT_02_PIN_00 = 0x0200, ///< IO port 2 pin 0 99 IOPORT_PORT_02_PIN_01 = 0x0201, ///< IO port 2 pin 1 100 IOPORT_PORT_02_PIN_02 = 0x0202, ///< IO port 2 pin 2 101 IOPORT_PORT_02_PIN_03 = 0x0203, ///< IO port 2 pin 3 102 IOPORT_PORT_02_PIN_04 = 0x0204, ///< IO port 2 pin 4 103 IOPORT_PORT_02_PIN_05 = 0x0205, ///< IO port 2 pin 5 104 IOPORT_PORT_02_PIN_06 = 0x0206, ///< IO port 2 pin 6 105 IOPORT_PORT_02_PIN_07 = 0x0207, ///< IO port 2 pin 7 106 IOPORT_PORT_02_PIN_08 = 0x0208, ///< IO port 2 pin 8 107 IOPORT_PORT_02_PIN_09 = 0x0209, ///< IO port 2 pin 9 108 IOPORT_PORT_02_PIN_10 = 0x020A, ///< IO port 2 pin 10 109 IOPORT_PORT_02_PIN_11 = 0x020B, ///< IO port 2 pin 11 110 IOPORT_PORT_02_PIN_12 = 0x020C, ///< IO port 2 pin 12 111 IOPORT_PORT_02_PIN_13 = 0x020D, ///< IO port 2 pin 13 112 IOPORT_PORT_02_PIN_14 = 0x020E, ///< IO port 2 pin 14 113 IOPORT_PORT_02_PIN_15 = 0x020F, ///< IO port 2 pin 15 114 115 IOPORT_PORT_03_PIN_00 = 0x0300, ///< IO port 3 pin 0 116 IOPORT_PORT_03_PIN_01 = 0x0301, ///< IO port 3 pin 1 117 IOPORT_PORT_03_PIN_02 = 0x0302, ///< IO port 3 pin 2 118 IOPORT_PORT_03_PIN_03 = 0x0303, ///< IO port 3 pin 3 119 IOPORT_PORT_03_PIN_04 = 0x0304, ///< IO port 3 pin 4 120 IOPORT_PORT_03_PIN_05 = 0x0305, ///< IO port 3 pin 5 121 IOPORT_PORT_03_PIN_06 = 0x0306, ///< IO port 3 pin 6 122 IOPORT_PORT_03_PIN_07 = 0x0307, ///< IO port 3 pin 7 123 IOPORT_PORT_03_PIN_08 = 0x0308, ///< IO port 3 pin 8 124 IOPORT_PORT_03_PIN_09 = 0x0309, ///< IO port 3 pin 9 125 IOPORT_PORT_03_PIN_10 = 0x030A, ///< IO port 3 pin 10 126 IOPORT_PORT_03_PIN_11 = 0x030B, ///< IO port 3 pin 11 127 IOPORT_PORT_03_PIN_12 = 0x030C, ///< IO port 3 pin 12 128 IOPORT_PORT_03_PIN_13 = 0x030D, ///< IO port 3 pin 13 129 IOPORT_PORT_03_PIN_14 = 0x030E, ///< IO port 3 pin 14 130 IOPORT_PORT_03_PIN_15 = 0x030F, ///< IO port 3 pin 15 131 132 IOPORT_PORT_04_PIN_00 = 0x0400, ///< IO port 4 pin 0 133 IOPORT_PORT_04_PIN_01 = 0x0401, ///< IO port 4 pin 1 134 IOPORT_PORT_04_PIN_02 = 0x0402, ///< IO port 4 pin 2 135 IOPORT_PORT_04_PIN_03 = 0x0403, ///< IO port 4 pin 3 136 IOPORT_PORT_04_PIN_04 = 0x0404, ///< IO port 4 pin 4 137 IOPORT_PORT_04_PIN_05 = 0x0405, ///< IO port 4 pin 5 138 IOPORT_PORT_04_PIN_06 = 0x0406, ///< IO port 4 pin 6 139 IOPORT_PORT_04_PIN_07 = 0x0407, ///< IO port 4 pin 7 140 IOPORT_PORT_04_PIN_08 = 0x0408, ///< IO port 4 pin 8 141 IOPORT_PORT_04_PIN_09 = 0x0409, ///< IO port 4 pin 9 142 IOPORT_PORT_04_PIN_10 = 0x040A, ///< IO port 4 pin 10 143 IOPORT_PORT_04_PIN_11 = 0x040B, ///< IO port 4 pin 11 144 IOPORT_PORT_04_PIN_12 = 0x040C, ///< IO port 4 pin 12 145 IOPORT_PORT_04_PIN_13 = 0x040D, ///< IO port 4 pin 13 146 IOPORT_PORT_04_PIN_14 = 0x040E, ///< IO port 4 pin 14 147 IOPORT_PORT_04_PIN_15 = 0x040F, ///< IO port 4 pin 15 148 149 IOPORT_PORT_05_PIN_00 = 0x0500, ///< IO port 5 pin 0 150 IOPORT_PORT_05_PIN_01 = 0x0501, ///< IO port 5 pin 1 151 IOPORT_PORT_05_PIN_02 = 0x0502, ///< IO port 5 pin 2 152 IOPORT_PORT_05_PIN_03 = 0x0503, ///< IO port 5 pin 3 153 IOPORT_PORT_05_PIN_04 = 0x0504, ///< IO port 5 pin 4 154 IOPORT_PORT_05_PIN_05 = 0x0505, ///< IO port 5 pin 5 155 IOPORT_PORT_05_PIN_06 = 0x0506, ///< IO port 5 pin 6 156 IOPORT_PORT_05_PIN_07 = 0x0507, ///< IO port 5 pin 7 157 IOPORT_PORT_05_PIN_08 = 0x0508, ///< IO port 5 pin 8 158 IOPORT_PORT_05_PIN_09 = 0x0509, ///< IO port 5 pin 9 159 IOPORT_PORT_05_PIN_10 = 0x050A, ///< IO port 5 pin 10 160 IOPORT_PORT_05_PIN_11 = 0x050B, ///< IO port 5 pin 11 161 IOPORT_PORT_05_PIN_12 = 0x050C, ///< IO port 5 pin 12 162 IOPORT_PORT_05_PIN_13 = 0x050D, ///< IO port 5 pin 13 163 IOPORT_PORT_05_PIN_14 = 0x050E, ///< IO port 5 pin 14 164 IOPORT_PORT_05_PIN_15 = 0x050F, ///< IO port 5 pin 15 165 166 IOPORT_PORT_06_PIN_00 = 0x0600, ///< IO port 6 pin 0 167 IOPORT_PORT_06_PIN_01 = 0x0601, ///< IO port 6 pin 1 168 IOPORT_PORT_06_PIN_02 = 0x0602, ///< IO port 6 pin 2 169 IOPORT_PORT_06_PIN_03 = 0x0603, ///< IO port 6 pin 3 170 IOPORT_PORT_06_PIN_04 = 0x0604, ///< IO port 6 pin 4 171 IOPORT_PORT_06_PIN_05 = 0x0605, ///< IO port 6 pin 5 172 IOPORT_PORT_06_PIN_06 = 0x0606, ///< IO port 6 pin 6 173 IOPORT_PORT_06_PIN_07 = 0x0607, ///< IO port 6 pin 7 174 IOPORT_PORT_06_PIN_08 = 0x0608, ///< IO port 6 pin 8 175 IOPORT_PORT_06_PIN_09 = 0x0609, ///< IO port 6 pin 9 176 IOPORT_PORT_06_PIN_10 = 0x060A, ///< IO port 6 pin 10 177 IOPORT_PORT_06_PIN_11 = 0x060B, ///< IO port 6 pin 11 178 IOPORT_PORT_06_PIN_12 = 0x060C, ///< IO port 6 pin 12 179 IOPORT_PORT_06_PIN_13 = 0x060D, ///< IO port 6 pin 13 180 IOPORT_PORT_06_PIN_14 = 0x060E, ///< IO port 6 pin 14 181 IOPORT_PORT_06_PIN_15 = 0x060F, ///< IO port 6 pin 15 182 183 IOPORT_PORT_07_PIN_00 = 0x0700, ///< IO port 7 pin 0 184 IOPORT_PORT_07_PIN_01 = 0x0701, ///< IO port 7 pin 1 185 IOPORT_PORT_07_PIN_02 = 0x0702, ///< IO port 7 pin 2 186 IOPORT_PORT_07_PIN_03 = 0x0703, ///< IO port 7 pin 3 187 IOPORT_PORT_07_PIN_04 = 0x0704, ///< IO port 7 pin 4 188 IOPORT_PORT_07_PIN_05 = 0x0705, ///< IO port 7 pin 5 189 IOPORT_PORT_07_PIN_06 = 0x0706, ///< IO port 7 pin 6 190 IOPORT_PORT_07_PIN_07 = 0x0707, ///< IO port 7 pin 7 191 IOPORT_PORT_07_PIN_08 = 0x0708, ///< IO port 7 pin 8 192 IOPORT_PORT_07_PIN_09 = 0x0709, ///< IO port 7 pin 9 193 IOPORT_PORT_07_PIN_10 = 0x070A, ///< IO port 7 pin 10 194 IOPORT_PORT_07_PIN_11 = 0x070B, ///< IO port 7 pin 11 195 IOPORT_PORT_07_PIN_12 = 0x070C, ///< IO port 7 pin 12 196 IOPORT_PORT_07_PIN_13 = 0x070D, ///< IO port 7 pin 13 197 IOPORT_PORT_07_PIN_14 = 0x070E, ///< IO port 7 pin 14 198 IOPORT_PORT_07_PIN_15 = 0x070F, ///< IO port 7 pin 15 199 200 IOPORT_PORT_08_PIN_00 = 0x0800, ///< IO port 8 pin 0 201 IOPORT_PORT_08_PIN_01 = 0x0801, ///< IO port 8 pin 1 202 IOPORT_PORT_08_PIN_02 = 0x0802, ///< IO port 8 pin 2 203 IOPORT_PORT_08_PIN_03 = 0x0803, ///< IO port 8 pin 3 204 IOPORT_PORT_08_PIN_04 = 0x0804, ///< IO port 8 pin 4 205 IOPORT_PORT_08_PIN_05 = 0x0805, ///< IO port 8 pin 5 206 IOPORT_PORT_08_PIN_06 = 0x0806, ///< IO port 8 pin 6 207 IOPORT_PORT_08_PIN_07 = 0x0807, ///< IO port 8 pin 7 208 IOPORT_PORT_08_PIN_08 = 0x0808, ///< IO port 8 pin 8 209 IOPORT_PORT_08_PIN_09 = 0x0809, ///< IO port 8 pin 9 210 IOPORT_PORT_08_PIN_10 = 0x080A, ///< IO port 8 pin 10 211 IOPORT_PORT_08_PIN_11 = 0x080B, ///< IO port 8 pin 11 212 IOPORT_PORT_08_PIN_12 = 0x080C, ///< IO port 8 pin 12 213 IOPORT_PORT_08_PIN_13 = 0x080D, ///< IO port 8 pin 13 214 IOPORT_PORT_08_PIN_14 = 0x080E, ///< IO port 8 pin 14 215 IOPORT_PORT_08_PIN_15 = 0x080F, ///< IO port 8 pin 15 216 217 IOPORT_PORT_09_PIN_00 = 0x0900, ///< IO port 9 pin 0 218 IOPORT_PORT_09_PIN_01 = 0x0901, ///< IO port 9 pin 1 219 IOPORT_PORT_09_PIN_02 = 0x0902, ///< IO port 9 pin 2 220 IOPORT_PORT_09_PIN_03 = 0x0903, ///< IO port 9 pin 3 221 IOPORT_PORT_09_PIN_04 = 0x0904, ///< IO port 9 pin 4 222 IOPORT_PORT_09_PIN_05 = 0x0905, ///< IO port 9 pin 5 223 IOPORT_PORT_09_PIN_06 = 0x0906, ///< IO port 9 pin 6 224 IOPORT_PORT_09_PIN_07 = 0x0907, ///< IO port 9 pin 7 225 IOPORT_PORT_09_PIN_08 = 0x0908, ///< IO port 9 pin 8 226 IOPORT_PORT_09_PIN_09 = 0x0909, ///< IO port 9 pin 9 227 IOPORT_PORT_09_PIN_10 = 0x090A, ///< IO port 9 pin 10 228 IOPORT_PORT_09_PIN_11 = 0x090B, ///< IO port 9 pin 11 229 IOPORT_PORT_09_PIN_12 = 0x090C, ///< IO port 9 pin 12 230 IOPORT_PORT_09_PIN_13 = 0x090D, ///< IO port 9 pin 13 231 IOPORT_PORT_09_PIN_14 = 0x090E, ///< IO port 9 pin 14 232 IOPORT_PORT_09_PIN_15 = 0x090F, ///< IO port 9 pin 15 233 234 IOPORT_PORT_10_PIN_00 = 0x0A00, ///< IO port 10 pin 0 235 IOPORT_PORT_10_PIN_01 = 0x0A01, ///< IO port 10 pin 1 236 IOPORT_PORT_10_PIN_02 = 0x0A02, ///< IO port 10 pin 2 237 IOPORT_PORT_10_PIN_03 = 0x0A03, ///< IO port 10 pin 3 238 IOPORT_PORT_10_PIN_04 = 0x0A04, ///< IO port 10 pin 4 239 IOPORT_PORT_10_PIN_05 = 0x0A05, ///< IO port 10 pin 5 240 IOPORT_PORT_10_PIN_06 = 0x0A06, ///< IO port 10 pin 6 241 IOPORT_PORT_10_PIN_07 = 0x0A07, ///< IO port 10 pin 7 242 IOPORT_PORT_10_PIN_08 = 0x0A08, ///< IO port 10 pin 8 243 IOPORT_PORT_10_PIN_09 = 0x0A09, ///< IO port 10 pin 9 244 IOPORT_PORT_10_PIN_10 = 0x0A0A, ///< IO port 10 pin 10 245 IOPORT_PORT_10_PIN_11 = 0x0A0B, ///< IO port 10 pin 11 246 IOPORT_PORT_10_PIN_12 = 0x0A0C, ///< IO port 10 pin 12 247 IOPORT_PORT_10_PIN_13 = 0x0A0D, ///< IO port 10 pin 13 248 IOPORT_PORT_10_PIN_14 = 0x0A0E, ///< IO port 10 pin 14 249 IOPORT_PORT_10_PIN_15 = 0x0A0F, ///< IO port 10 pin 15 250 251 IOPORT_PORT_11_PIN_00 = 0x0B00, ///< IO port 11 pin 0 252 IOPORT_PORT_11_PIN_01 = 0x0B01, ///< IO port 11 pin 1 253 IOPORT_PORT_11_PIN_02 = 0x0B02, ///< IO port 11 pin 2 254 IOPORT_PORT_11_PIN_03 = 0x0B03, ///< IO port 11 pin 3 255 IOPORT_PORT_11_PIN_04 = 0x0B04, ///< IO port 11 pin 4 256 IOPORT_PORT_11_PIN_05 = 0x0B05, ///< IO port 11 pin 5 257 IOPORT_PORT_11_PIN_06 = 0x0B06, ///< IO port 11 pin 6 258 IOPORT_PORT_11_PIN_07 = 0x0B07, ///< IO port 11 pin 7 259 IOPORT_PORT_11_PIN_08 = 0x0B08, ///< IO port 11 pin 8 260 IOPORT_PORT_11_PIN_09 = 0x0B09, ///< IO port 11 pin 9 261 IOPORT_PORT_11_PIN_10 = 0x0B0A, ///< IO port 11 pin 10 262 IOPORT_PORT_11_PIN_11 = 0x0B0B, ///< IO port 11 pin 11 263 IOPORT_PORT_11_PIN_12 = 0x0B0C, ///< IO port 11 pin 12 264 IOPORT_PORT_11_PIN_13 = 0x0B0D, ///< IO port 11 pin 13 265 IOPORT_PORT_11_PIN_14 = 0x0B0E, ///< IO port 11 pin 14 266 IOPORT_PORT_11_PIN_15 = 0x0B0F, ///< IO port 11 pin 15 267 268 IOPORT_PORT_12_PIN_00 = 0x0C00, ///< IO port 12 pin 0 269 IOPORT_PORT_12_PIN_01 = 0x0C01, ///< IO port 12 pin 1 270 IOPORT_PORT_12_PIN_02 = 0x0C02, ///< IO port 12 pin 2 271 IOPORT_PORT_12_PIN_03 = 0x0C03, ///< IO port 12 pin 3 272 IOPORT_PORT_12_PIN_04 = 0x0C04, ///< IO port 12 pin 4 273 IOPORT_PORT_12_PIN_05 = 0x0C05, ///< IO port 12 pin 5 274 IOPORT_PORT_12_PIN_06 = 0x0C06, ///< IO port 12 pin 6 275 IOPORT_PORT_12_PIN_07 = 0x0C07, ///< IO port 12 pin 7 276 IOPORT_PORT_12_PIN_08 = 0x0C08, ///< IO port 12 pin 8 277 IOPORT_PORT_12_PIN_09 = 0x0C09, ///< IO port 12 pin 9 278 IOPORT_PORT_12_PIN_10 = 0x0C0A, ///< IO port 12 pin 10 279 IOPORT_PORT_12_PIN_11 = 0x0C0B, ///< IO port 12 pin 11 280 IOPORT_PORT_12_PIN_12 = 0x0C0C, ///< IO port 12 pin 12 281 IOPORT_PORT_12_PIN_13 = 0x0C0D, ///< IO port 12 pin 13 282 IOPORT_PORT_12_PIN_14 = 0x0C0E, ///< IO port 12 pin 14 283 IOPORT_PORT_12_PIN_15 = 0x0C0F, ///< IO port 12 pin 15 284 285 IOPORT_PORT_13_PIN_00 = 0x0D00, ///< IO port 13 pin 0 286 IOPORT_PORT_13_PIN_01 = 0x0D01, ///< IO port 13 pin 1 287 IOPORT_PORT_13_PIN_02 = 0x0D02, ///< IO port 13 pin 2 288 IOPORT_PORT_13_PIN_03 = 0x0D03, ///< IO port 13 pin 3 289 IOPORT_PORT_13_PIN_04 = 0x0D04, ///< IO port 13 pin 4 290 IOPORT_PORT_13_PIN_05 = 0x0D05, ///< IO port 13 pin 5 291 IOPORT_PORT_13_PIN_06 = 0x0D06, ///< IO port 13 pin 6 292 IOPORT_PORT_13_PIN_07 = 0x0D07, ///< IO port 13 pin 7 293 IOPORT_PORT_13_PIN_08 = 0x0D08, ///< IO port 13 pin 8 294 IOPORT_PORT_13_PIN_09 = 0x0D09, ///< IO port 13 pin 9 295 IOPORT_PORT_13_PIN_10 = 0x0D0A, ///< IO port 13 pin 10 296 IOPORT_PORT_13_PIN_11 = 0x0D0B, ///< IO port 13 pin 11 297 IOPORT_PORT_13_PIN_12 = 0x0D0C, ///< IO port 13 pin 12 298 IOPORT_PORT_13_PIN_13 = 0x0D0D, ///< IO port 13 pin 13 299 IOPORT_PORT_13_PIN_14 = 0x0D0E, ///< IO port 13 pin 14 300 IOPORT_PORT_13_PIN_15 = 0x0D0F, ///< IO port 13 pin 15 301 302 IOPORT_PORT_14_PIN_00 = 0x0E00, ///< IO port 14 pin 0 303 IOPORT_PORT_14_PIN_01 = 0x0E01, ///< IO port 14 pin 1 304 IOPORT_PORT_14_PIN_02 = 0x0E02, ///< IO port 14 pin 2 305 IOPORT_PORT_14_PIN_03 = 0x0E03, ///< IO port 14 pin 3 306 IOPORT_PORT_14_PIN_04 = 0x0E04, ///< IO port 14 pin 4 307 IOPORT_PORT_14_PIN_05 = 0x0E05, ///< IO port 14 pin 5 308 IOPORT_PORT_14_PIN_06 = 0x0E06, ///< IO port 14 pin 6 309 IOPORT_PORT_14_PIN_07 = 0x0E07, ///< IO port 14 pin 7 310 IOPORT_PORT_14_PIN_08 = 0x0E08, ///< IO port 14 pin 8 311 IOPORT_PORT_14_PIN_09 = 0x0E09, ///< IO port 14 pin 9 312 IOPORT_PORT_14_PIN_10 = 0x0E0A, ///< IO port 14 pin 10 313 IOPORT_PORT_14_PIN_11 = 0x0E0B, ///< IO port 14 pin 11 314 IOPORT_PORT_14_PIN_12 = 0x0E0C, ///< IO port 14 pin 12 315 IOPORT_PORT_14_PIN_13 = 0x0E0D, ///< IO port 14 pin 13 316 IOPORT_PORT_14_PIN_14 = 0x0E0E, ///< IO port 14 pin 14 317 IOPORT_PORT_14_PIN_15 = 0x0E0F, ///< IO port 14 pin 15 318 } ioport_port_pin_t; 319 320 /** Superset of all peripheral functions. */ 321 typedef enum e_ioport_peripheral 322 { 323 /** Pin will functions as an IO pin */ 324 IOPORT_PERIPHERAL_IO = 0x00, 325 326 /** Pin will function as a DEBUG pin */ 327 IOPORT_PERIPHERAL_DEBUG = (0x00UL << IOPORT_PRV_PFS_PSEL_OFFSET), 328 329 /** Pin will function as an AGT peripheral pin */ 330 IOPORT_PERIPHERAL_AGT = (0x01UL << IOPORT_PRV_PFS_PSEL_OFFSET), 331 332 /** Pin will function as an AGT peripheral pin */ 333 IOPORT_PERIPHERAL_AGTW = (0x01UL << IOPORT_PRV_PFS_PSEL_OFFSET), 334 335 /** Pin will function as an AGT peripheral pin */ 336 IOPORT_PERIPHERAL_AGT1 = (0x18UL << IOPORT_PRV_PFS_PSEL_OFFSET), 337 338 /** Pin will function as a GPT peripheral pin */ 339 IOPORT_PERIPHERAL_GPT0 = (0x02UL << IOPORT_PRV_PFS_PSEL_OFFSET), 340 341 /** Pin will function as a GPT peripheral pin */ 342 IOPORT_PERIPHERAL_GPT1 = (0x03UL << IOPORT_PRV_PFS_PSEL_OFFSET), 343 344 /** Pin will function as an SCI peripheral pin */ 345 IOPORT_PERIPHERAL_SCI0_2_4_6_8 = (0x04UL << IOPORT_PRV_PFS_PSEL_OFFSET), 346 347 /** Pin will function as an SCI peripheral pin */ 348 IOPORT_PERIPHERAL_SCI1_3_5_7_9 = (0x05UL << IOPORT_PRV_PFS_PSEL_OFFSET), 349 350 /** Pin will function as a SPI peripheral pin */ 351 IOPORT_PERIPHERAL_SPI = (0x06UL << IOPORT_PRV_PFS_PSEL_OFFSET), 352 353 /** Pin will function as a IIC peripheral pin */ 354 IOPORT_PERIPHERAL_IIC = (0x07UL << IOPORT_PRV_PFS_PSEL_OFFSET), 355 356 /** Pin will function as a KEY peripheral pin */ 357 IOPORT_PERIPHERAL_KEY = (0x08UL << IOPORT_PRV_PFS_PSEL_OFFSET), 358 359 /** Pin will function as a clock/comparator/RTC peripheral pin */ 360 IOPORT_PERIPHERAL_CLKOUT_COMP_RTC = (0x09UL << IOPORT_PRV_PFS_PSEL_OFFSET), 361 362 /** Pin will function as a CAC/ADC peripheral pin */ 363 IOPORT_PERIPHERAL_CAC_AD = (0x0AUL << IOPORT_PRV_PFS_PSEL_OFFSET), 364 365 /** Pin will function as a BUS peripheral pin */ 366 IOPORT_PERIPHERAL_BUS = (0x0BUL << IOPORT_PRV_PFS_PSEL_OFFSET), 367 368 /** Pin will function as a CTSU peripheral pin */ 369 IOPORT_PERIPHERAL_CTSU = (0x0CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 370 371 /** Pin will function as a CMPHS peripheral pin */ 372 IOPORT_PERIPHERAL_ACMPHS = (0x0CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 373 374 /** Pin will function as a segment LCD peripheral pin */ 375 IOPORT_PERIPHERAL_LCDC = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 376 377 #if BSP_FEATURE_SCI_UART_DE_IS_INVERTED 378 379 /** Pin will function as an SCI peripheral DEn pin */ 380 IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 381 382 /** Pin will function as an SCI DEn peripheral pin */ 383 IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 384 #else 385 386 /** Pin will function as an SCI peripheral DEn pin */ 387 IOPORT_PERIPHERAL_DE_SCI0_2_4_6_8 = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 388 389 /** Pin will function as an SCI DEn peripheral pin */ 390 IOPORT_PERIPHERAL_DE_SCI1_3_5_7_9 = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 391 #endif 392 393 /** Pin will function as a DALI peripheral pin */ 394 IOPORT_PERIPHERAL_DALI = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 395 396 /** Pin will function as a CEU peripheral pin */ 397 IOPORT_PERIPHERAL_CEU = (0x0FUL << IOPORT_PRV_PFS_PSEL_OFFSET), 398 399 /** Pin will function as a CAN peripheral pin */ 400 IOPORT_PERIPHERAL_CAN = (0x10UL << IOPORT_PRV_PFS_PSEL_OFFSET), 401 402 /** Pin will function as a QSPI peripheral pin */ 403 IOPORT_PERIPHERAL_QSPI = (0x11UL << IOPORT_PRV_PFS_PSEL_OFFSET), 404 405 /** Pin will function as an SSI peripheral pin */ 406 IOPORT_PERIPHERAL_SSI = (0x12UL << IOPORT_PRV_PFS_PSEL_OFFSET), 407 408 /** Pin will function as a USB full speed peripheral pin */ 409 IOPORT_PERIPHERAL_USB_FS = (0x13UL << IOPORT_PRV_PFS_PSEL_OFFSET), 410 411 /** Pin will function as a USB high speed peripheral pin */ 412 IOPORT_PERIPHERAL_USB_HS = (0x14UL << IOPORT_PRV_PFS_PSEL_OFFSET), 413 414 /** Pin will function as a GPT peripheral pin */ 415 IOPORT_PERIPHERAL_GPT2 = (0x14UL << IOPORT_PRV_PFS_PSEL_OFFSET), 416 417 /** Pin will function as an SD/MMC peripheral pin */ 418 IOPORT_PERIPHERAL_SDHI_MMC = (0x15UL << IOPORT_PRV_PFS_PSEL_OFFSET), 419 420 /** Pin will function as a GPT peripheral pin */ 421 IOPORT_PERIPHERAL_GPT3 = (0x15UL << IOPORT_PRV_PFS_PSEL_OFFSET), 422 423 /** Pin will function as an Ethernet MMI peripheral pin */ 424 IOPORT_PERIPHERAL_ETHER_MII = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), 425 426 /** Pin will function as a GPT peripheral pin */ 427 IOPORT_PERIPHERAL_GPT4 = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), 428 429 /** Pin will function as an Ethernet RMMI peripheral pin */ 430 IOPORT_PERIPHERAL_ETHER_RMII = (0x17UL << IOPORT_PRV_PFS_PSEL_OFFSET), 431 432 /** Pin will function as a PDC peripheral pin */ 433 IOPORT_PERIPHERAL_PDC = (0x18UL << IOPORT_PRV_PFS_PSEL_OFFSET), 434 435 /** Pin will function as a graphics LCD peripheral pin */ 436 IOPORT_PERIPHERAL_LCD_GRAPHICS = (0x19UL << IOPORT_PRV_PFS_PSEL_OFFSET), 437 438 /** Pin will function as a CAC peripheral pin */ 439 IOPORT_PERIPHERAL_CAC = (0x19UL << IOPORT_PRV_PFS_PSEL_OFFSET), 440 441 /** Pin will function as a debug trace peripheral pin */ 442 IOPORT_PERIPHERAL_TRACE = (0x1AUL << IOPORT_PRV_PFS_PSEL_OFFSET), 443 444 /** Pin will function as a OSPI peripheral pin */ 445 IOPORT_PERIPHERAL_OSPI = (0x1CUL << IOPORT_PRV_PFS_PSEL_OFFSET), 446 447 /** Pin will function as a CEC peripheral pin */ 448 IOPORT_PERIPHERAL_CEC = (0x1DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 449 450 /** Pin will function as a PGAOUT peripheral pin */ 451 IOPORT_PERIPHERAL_PGAOUT0 = (0x1DUL << IOPORT_PRV_PFS_PSEL_OFFSET), 452 453 /** Pin will function as a PGAOUT peripheral pin */ 454 IOPORT_PERIPHERAL_PGAOUT1 = (0x1EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 455 456 /** Pin will function as a ULPT peripheral pin */ 457 IOPORT_PERIPHERAL_ULPT = (0x1EUL << IOPORT_PRV_PFS_PSEL_OFFSET), 458 459 /** Pin will function as a MIPI DSI peripheral pin */ 460 IOPORT_PERIPHERAL_MIPI = (0x1FUL << IOPORT_PRV_PFS_PSEL_OFFSET), 461 } ioport_peripheral_t; 462 463 /** Options to configure pin functions */ 464 typedef enum e_ioport_cfg_options 465 { 466 IOPORT_CFG_PORT_DIRECTION_INPUT = 0x00000000, ///< Sets the pin direction to input (default) 467 IOPORT_CFG_PORT_DIRECTION_OUTPUT = 0x00000004, ///< Sets the pin direction to output 468 IOPORT_CFG_PORT_OUTPUT_LOW = 0x00000000, ///< Sets the pin level to low 469 IOPORT_CFG_PORT_OUTPUT_HIGH = 0x00000001, ///< Sets the pin level to high 470 IOPORT_CFG_PULLUP_ENABLE = 0x00000010, ///< Enables the pin's internal pull-up 471 IOPORT_CFG_PIM_TTL = 0x00000020, ///< Enables the pin's input mode 472 IOPORT_CFG_NMOS_ENABLE = 0x00000040, ///< Enables the pin's NMOS open-drain output 473 IOPORT_CFG_PMOS_ENABLE = 0x00000080, ///< Enables the pin's PMOS open-drain ouput 474 IOPORT_CFG_DRIVE_MID = 0x00000400, ///< Sets pin drive output to medium 475 IOPORT_CFG_DRIVE_HS_HIGH = 0x00000800, ///< Sets pin drive output to high along with supporting high speed 476 IOPORT_CFG_DRIVE_MID_IIC = 0x00000C00, ///< Sets pin to drive output needed for IIC on a 20mA port 477 IOPORT_CFG_DRIVE_HIGH = 0x00000C00, ///< Sets pin drive output to high 478 IOPORT_CFG_EVENT_RISING_EDGE = 0x00001000, ///< Sets pin event trigger to rising edge 479 IOPORT_CFG_EVENT_FALLING_EDGE = 0x00002000, ///< Sets pin event trigger to falling edge 480 IOPORT_CFG_EVENT_BOTH_EDGES = 0x00003000, ///< Sets pin event trigger to both edges 481 IOPORT_CFG_IRQ_ENABLE = 0x00004000, ///< Sets pin as an IRQ pin 482 IOPORT_CFG_ANALOG_ENABLE = 0x00008000, ///< Enables pin to operate as an analog pin 483 IOPORT_CFG_PERIPHERAL_PIN = 0x00010000 ///< Enables pin to operate as a peripheral pin 484 } ioport_cfg_options_t; 485 486 /********************************************************************************************************************** 487 * Exported global variables 488 **********************************************************************************************************************/ 489 490 /** @cond INC_HEADER_DEFS_SEC */ 491 /** Filled in Interface API structure for this Instance. */ 492 extern const ioport_api_t g_ioport_on_ioport; 493 494 /** @endcond */ 495 496 /*********************************************************************************************************************** 497 * Public APIs 498 **********************************************************************************************************************/ 499 500 fsp_err_t R_IOPORT_Open(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg); 501 fsp_err_t R_IOPORT_Close(ioport_ctrl_t * const p_ctrl); 502 fsp_err_t R_IOPORT_PinsCfg(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg); 503 fsp_err_t R_IOPORT_PinCfg(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg); 504 fsp_err_t R_IOPORT_PinEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_event); 505 fsp_err_t R_IOPORT_PinEventOutputWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value); 506 fsp_err_t R_IOPORT_PinRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_value); 507 fsp_err_t R_IOPORT_PinWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level); 508 fsp_err_t R_IOPORT_PortDirectionSet(ioport_ctrl_t * const p_ctrl, 509 bsp_io_port_t port, 510 ioport_size_t direction_values, 511 ioport_size_t mask); 512 fsp_err_t R_IOPORT_PortEventInputRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * event_data); 513 fsp_err_t R_IOPORT_PortEventOutputWrite(ioport_ctrl_t * const p_ctrl, 514 bsp_io_port_t port, 515 ioport_size_t event_data, 516 ioport_size_t mask_value); 517 fsp_err_t R_IOPORT_PortRead(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_port_value); 518 fsp_err_t R_IOPORT_PortWrite(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask); 519 520 /*******************************************************************************************************************//** 521 * @} (end defgroup IOPORT) 522 **********************************************************************************************************************/ 523 524 /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ 525 FSP_FOOTER 526 527 #endif // R_IOPORT_H 528