1 /* generated HAL source file - do not edit */
2 #include "hal_data.h"
3 sci_uart_instance_ctrl_t g_uart0_ctrl;
4
5 #define FSP_NOT_DEFINED (1)
6 #if (FSP_NOT_DEFINED) != (FSP_NOT_DEFINED)
7
8 /* If the transfer module is DMAC, define a DMAC transfer callback. */
9 extern void sci_uart_tx_dmac_callback(sci_uart_instance_ctrl_t * p_instance_ctrl);
10
g_uart0_tx_transfer_callback(transfer_callback_args_t * p_args)11 void g_uart0_tx_transfer_callback (transfer_callback_args_t * p_args)
12 {
13 FSP_PARAMETER_NOT_USED(p_args);
14 sci_uart_tx_dmac_callback(&g_uart0_ctrl);
15 }
16 #endif
17
18 #if (FSP_NOT_DEFINED) != (FSP_NOT_DEFINED)
19
20 /* If the transfer module is DMAC, define a DMAC transfer callback. */
21 extern void sci_uart_rx_dmac_callback(sci_uart_instance_ctrl_t * p_instance_ctrl);
22
g_uart0_rx_transfer_callback(transfer_callback_args_t * p_args)23 void g_uart0_rx_transfer_callback (transfer_callback_args_t * p_args)
24 {
25 FSP_PARAMETER_NOT_USED(p_args);
26 sci_uart_rx_dmac_callback(&g_uart0_ctrl);
27 }
28 #endif
29 #undef FSP_NOT_DEFINED
30
31 sci_baud_setting_t g_uart0_baud_setting =
32 {
33 /* Baud rate calculated with 0.160% error. */ .baudrate_bits_b.abcse = 0, .baudrate_bits_b.abcs = 0, .baudrate_bits_b.bgdm = 1, .baudrate_bits_b.cks = 0, .baudrate_bits_b.brr = 51, .baudrate_bits_b.mddr = (uint8_t) 256, .baudrate_bits_b.brme = false
34 };
35
36 /** UART extended configuration for UARTonSCI HAL driver */
37 const sci_uart_extended_cfg_t g_uart0_cfg_extend =
38 {
39 .clock = SCI_UART_CLOCK_INT,
40 .rx_edge_start = SCI_UART_START_BIT_FALLING_EDGE,
41 .noise_cancel = SCI_UART_NOISE_CANCELLATION_DISABLE,
42 .rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_MAX,
43 .p_baud_setting = &g_uart0_baud_setting,
44 #if 1
45 .clock_source = SCI_UART_CLOCK_SOURCE_SCI0ASYNCCLK,
46 #else
47 .clock_source = SCI_UART_CLOCK_SOURCE_PCLKM,
48 #endif
49 .flow_control = SCI_UART_FLOW_CONTROL_RTS,
50 #if 0xFF != 0xFF
51 .flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
52 #else
53 .flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
54 #endif
55 .rs485_setting = {
56 .enable = SCI_UART_RS485_DISABLE,
57 .polarity = SCI_UART_RS485_DE_POLARITY_HIGH,
58 .assertion_time = 1,
59 .negation_time = 1,
60 },
61 };
62
63 /** UART interface configuration */
64 const uart_cfg_t g_uart0_cfg =
65 {
66 .channel = 0,
67 .data_bits = UART_DATA_BITS_8,
68 .parity = UART_PARITY_OFF,
69 .stop_bits = UART_STOP_BITS_1,
70 .p_callback = user_uart0_callback,
71 .p_context = NULL,
72 .p_extend = &g_uart0_cfg_extend,
73 .p_transfer_tx = g_uart0_P_TRANSFER_TX,
74 .p_transfer_rx = g_uart0_P_TRANSFER_RX,
75 .rxi_ipl = (12),
76 .txi_ipl = (12),
77 .tei_ipl = (12),
78 .eri_ipl = (12),
79 #if defined(VECTOR_NUMBER_SCI0_RXI)
80 .rxi_irq = VECTOR_NUMBER_SCI0_RXI,
81 #else
82 .rxi_irq = FSP_INVALID_VECTOR,
83 #endif
84 #if defined(VECTOR_NUMBER_SCI0_TXI)
85 .txi_irq = VECTOR_NUMBER_SCI0_TXI,
86 #else
87 .txi_irq = FSP_INVALID_VECTOR,
88 #endif
89 #if defined(VECTOR_NUMBER_SCI0_TEI)
90 .tei_irq = VECTOR_NUMBER_SCI0_TEI,
91 #else
92 .tei_irq = FSP_INVALID_VECTOR,
93 #endif
94 #if defined(VECTOR_NUMBER_SCI0_ERI)
95 .eri_irq = VECTOR_NUMBER_SCI0_ERI,
96 #else
97 .eri_irq = FSP_INVALID_VECTOR,
98 #endif
99 };
100
101 /* Instance structure to use this module. */
102 const uart_instance_t g_uart0 =
103 {
104 .p_ctrl = &g_uart0_ctrl,
105 .p_cfg = &g_uart0_cfg,
106 .p_api = &g_uart_on_sci
107 };
g_hal_init(void)108 void g_hal_init(void) {
109 g_common_init();
110 }
111