1/*
2                  Linker File for Renesas RZ/N2L FSP
3*/
4/* The memory information for each device is done in memory regions file.
5 * The starting address and length of memory not defined in memory regions file are defined as 0. */
6
7/* generated memory regions file - do not edit */
8ATCM_START  = 0x00000000;
9ATCM_LENGTH = 0x20000;
10BTCM_START  = 0x00100000;
11BTCM_LENGTH = 0x20000;
12SYSTEM_RAM_START  = 0x10000000;
13SYSTEM_RAM_LENGTH = 0x180000;
14SYSTEM_RAM_MIRROR_START  = 0x30000000;
15SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
16xSPI0_CS0_SPACE_MIRROR_START  = 0x40000000;
17xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
18xSPI0_CS1_SPACE_MIRROR_START  = 0x44000000;
19xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
20xSPI1_CS0_SPACE_MIRROR_START  = 0x48000000;
21xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
22CS0_SPACE_MIRROR_START  = 0x50000000;
23CS0_SPACE_MIRROR_LENGTH = 0x4000000;
24CS2_SPACE_MIRROR_START  = 0x54000000;
25CS2_SPACE_MIRROR_LENGTH = 0x4000000;
26CS3_SPACE_MIRROR_START  = 0x58000000;
27CS3_SPACE_MIRROR_LENGTH = 0x4000000;
28CS5_SPACE_MIRROR_START  = 0x5C000000;
29CS5_SPACE_MIRROR_LENGTH = 0x4000000;
30xSPI0_CS0_SPACE_START  = 0x60000000;
31xSPI0_CS0_SPACE_LENGTH = 0x4000000;
32xSPI0_CS1_SPACE_START  = 0x64000000;
33xSPI0_CS1_SPACE_LENGTH = 0x4000000;
34xSPI1_CS0_SPACE_START  = 0x68000000;
35xSPI1_CS0_SPACE_LENGTH = 0x4000000;
36CS0_SPACE_START  = 0x70000000;
37CS0_SPACE_LENGTH = 0x4000000;
38CS2_SPACE_START  = 0x74000000;
39CS2_SPACE_LENGTH = 0x4000000;
40CS3_SPACE_START  = 0x78000000;
41CS3_SPACE_LENGTH = 0x4000000;
42CS5_SPACE_START  = 0x7C000000;
43CS5_SPACE_LENGTH = 0x4000000;
44
45ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
46ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
47BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
48BTCM_PRV_LENGTH = DEFINED(BTCM_LENGTH) ? BTCM_LENGTH : 0;
49SYSTEM_RAM_PRV_START = DEFINED(SYSTEM_RAM_START) ? SYSTEM_RAM_START : 0;
50SYSTEM_RAM_PRV_LENGTH = DEFINED(SYSTEM_RAM_LENGTH) ? SYSTEM_RAM_LENGTH : 0;
51SYSTEM_RAM_MIRROR_PRV_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START : 0;
52SYSTEM_RAM_MIRROR_PRV_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? SYSTEM_RAM_MIRROR_LENGTH : 0;
53xSPI0_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS0_SPACE_MIRROR_START) ? xSPI0_CS0_SPACE_MIRROR_START : 0;
54xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_MIRROR_LENGTH) ? xSPI0_CS0_SPACE_MIRROR_LENGTH : 0;
55xSPI0_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS1_SPACE_MIRROR_START) ? xSPI0_CS1_SPACE_MIRROR_START : 0;
56xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_MIRROR_LENGTH) ? xSPI0_CS1_SPACE_MIRROR_LENGTH : 0;
57xSPI1_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS0_SPACE_MIRROR_START) ? xSPI1_CS0_SPACE_MIRROR_START : 0;
58xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_MIRROR_LENGTH) ? xSPI1_CS0_SPACE_MIRROR_LENGTH : 0;
59xSPI1_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS1_SPACE_MIRROR_START) ? xSPI1_CS1_SPACE_MIRROR_START : 0;
60xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_MIRROR_LENGTH) ? xSPI1_CS1_SPACE_MIRROR_LENGTH : 0;
61CS0_SPACE_MIRROR_PRV_START = DEFINED(CS0_SPACE_MIRROR_START) ? CS0_SPACE_MIRROR_START : 0;
62CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS0_SPACE_MIRROR_LENGTH) ? CS0_SPACE_MIRROR_LENGTH : 0;
63CS2_SPACE_MIRROR_PRV_START = DEFINED(CS2_SPACE_MIRROR_START) ? CS2_SPACE_MIRROR_START : 0;
64CS2_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS2_SPACE_MIRROR_LENGTH) ? CS2_SPACE_MIRROR_LENGTH : 0;
65CS3_SPACE_MIRROR_PRV_START = DEFINED(CS3_SPACE_MIRROR_START) ? CS3_SPACE_MIRROR_START : 0;
66CS3_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS3_SPACE_MIRROR_LENGTH) ? CS3_SPACE_MIRROR_LENGTH : 0;
67CS5_SPACE_MIRROR_PRV_START = DEFINED(CS5_SPACE_MIRROR_START) ? CS5_SPACE_MIRROR_START : 0;
68CS5_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS5_SPACE_MIRROR_LENGTH) ? CS5_SPACE_MIRROR_LENGTH : 0;
69xSPI0_CS0_SPACE_PRV_START = DEFINED(xSPI0_CS0_SPACE_START) ? xSPI0_CS0_SPACE_START : 0;
70xSPI0_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_LENGTH) ? xSPI0_CS0_SPACE_LENGTH : 0;
71xSPI0_CS1_SPACE_PRV_START = DEFINED(xSPI0_CS1_SPACE_START) ? xSPI0_CS1_SPACE_START : 0;
72xSPI0_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_LENGTH) ? xSPI0_CS1_SPACE_LENGTH : 0;
73xSPI1_CS0_SPACE_PRV_START = DEFINED(xSPI1_CS0_SPACE_START) ? xSPI1_CS0_SPACE_START : 0;
74xSPI1_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_LENGTH) ? xSPI1_CS0_SPACE_LENGTH : 0;
75xSPI1_CS1_SPACE_PRV_START = DEFINED(xSPI1_CS1_SPACE_START) ? xSPI1_CS1_SPACE_START : 0;
76xSPI1_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_LENGTH) ? xSPI1_CS1_SPACE_LENGTH : 0;
77CS0_SPACE_PRV_START = DEFINED(CS0_SPACE_START) ? CS0_SPACE_START : 0;
78CS0_SPACE_PRV_LENGTH = DEFINED(CS0_SPACE_LENGTH) ? CS0_SPACE_LENGTH : 0;
79CS2_SPACE_PRV_START = DEFINED(CS2_SPACE_START) ? CS2_SPACE_START : 0;
80CS2_SPACE_PRV_LENGTH = DEFINED(CS2_SPACE_LENGTH) ? CS2_SPACE_LENGTH : 0;
81CS3_SPACE_PRV_START = DEFINED(CS3_SPACE_START) ? CS3_SPACE_START : 0;
82CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
83CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
84CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
85
86LOADER_PARAM_ADDRESS       = xSPI0_CS0_SPACE_PRV_START;
87FLASH_CONTENTS_ADDRESS     = LOADER_PARAM_ADDRESS + 0x0000004C;
88LOADER_TEXT_ADDRESS        = 0x00102000;
89INTVEC_ADDRESS             = 0x10000000;
90TEXT_ADDRESS               = 0x10020000;
91NONCACHE_BUFFER_OFFSET     = 0x00020000;
92DMAC_LINK_MODE_OFFSET      = 0x00044000;
93DATA_NONCACHE_OFFSET       = 0x00048000;
94RAM_START                  = SYSTEM_RAM_PRV_START;
95RAM_LENGTH                 = SYSTEM_RAM_PRV_LENGTH;
96LOADER_START               = BTCM_PRV_START;
97LOADER_LENGTH              = BTCM_PRV_LENGTH;
98
99/* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
100DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
101DATA_NONCACHE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
102DMAC_LINK_MODE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DMAC_LINK_MODE_OFFSET : 0;
103DMAC_LINK_MODE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
104SHARED_NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - 0x00040000 : 0;
105SHARED_NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
106NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - NONCACHE_BUFFER_OFFSET : 0;
107NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
108
109MEMORY
110{
111    ATCM : ORIGIN = ATCM_PRV_START, LENGTH = ATCM_PRV_LENGTH
112    BTCM : ORIGIN = BTCM_PRV_START, LENGTH = BTCM_PRV_LENGTH
113    SYSTEM_RAM : ORIGIN = SYSTEM_RAM_PRV_START, LENGTH = SYSTEM_RAM_PRV_LENGTH
114    SYSTEM_RAM_MIRROR : ORIGIN = SYSTEM_RAM_MIRROR_PRV_START, LENGTH = SYSTEM_RAM_MIRROR_PRV_LENGTH
115    xSPI0_CS0_SPACE_MIRROR : ORIGIN = xSPI0_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH
116    xSPI0_CS1_SPACE_MIRROR : ORIGIN = xSPI0_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH
117    xSPI1_CS0_SPACE_MIRROR : ORIGIN = xSPI1_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH
118    xSPI1_CS1_SPACE_MIRROR : ORIGIN = xSPI1_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH
119    CS0_SPACE_MIRROR : ORIGIN = CS0_SPACE_MIRROR_PRV_START, LENGTH = CS0_SPACE_MIRROR_PRV_LENGTH
120    CS2_SPACE_MIRROR : ORIGIN = CS2_SPACE_MIRROR_PRV_START, LENGTH = CS2_SPACE_MIRROR_PRV_LENGTH
121    CS3_SPACE_MIRROR : ORIGIN = CS3_SPACE_MIRROR_PRV_START, LENGTH = CS3_SPACE_MIRROR_PRV_LENGTH
122    CS5_SPACE_MIRROR : ORIGIN = CS5_SPACE_MIRROR_PRV_START, LENGTH = CS5_SPACE_MIRROR_PRV_LENGTH
123    xSPI0_CS0_SPACE : ORIGIN = xSPI0_CS0_SPACE_PRV_START, LENGTH = xSPI0_CS0_SPACE_PRV_LENGTH
124    xSPI0_CS1_SPACE : ORIGIN = xSPI0_CS1_SPACE_PRV_START, LENGTH = xSPI0_CS1_SPACE_PRV_LENGTH
125    xSPI1_CS0_SPACE : ORIGIN = xSPI1_CS0_SPACE_PRV_START, LENGTH = xSPI1_CS0_SPACE_PRV_LENGTH
126    xSPI1_CS1_SPACE : ORIGIN = xSPI1_CS1_SPACE_PRV_START, LENGTH = xSPI1_CS1_SPACE_PRV_LENGTH
127    CS0_SPACE : ORIGIN = CS0_SPACE_PRV_START, LENGTH = CS0_SPACE_PRV_LENGTH
128    CS2_SPACE : ORIGIN = CS2_SPACE_PRV_START, LENGTH = CS2_SPACE_PRV_LENGTH
129    CS3_SPACE : ORIGIN = CS3_SPACE_PRV_START, LENGTH = CS3_SPACE_PRV_LENGTH
130    CS5_SPACE : ORIGIN = CS5_SPACE_PRV_START, LENGTH = CS5_SPACE_PRV_LENGTH
131    RAM : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
132    LOADER_STACK : ORIGIN = LOADER_START, LENGTH = LOADER_LENGTH
133    DUMMY : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
134    DATA_NONCACHE : ORIGIN = DATA_NONCACHE_START, LENGTH = DATA_NONCACHE_LENGTH
135    DMAC_LINK_MODE : ORIGIN = DMAC_LINK_MODE_START, LENGTH = DMAC_LINK_MODE_LENGTH
136    SHARED_NONCACHE_BUFFER : ORIGIN = SHARED_NONCACHE_BUFFER_START, LENGTH = SHARED_NONCACHE_BUFFER_LENGTH
137    NONCACHE_BUFFER : ORIGIN = NONCACHE_BUFFER_START, LENGTH = NONCACHE_BUFFER_LENGTH
138}
139
140SECTIONS
141{
142    .loader_param LOADER_PARAM_ADDRESS : AT (LOADER_PARAM_ADDRESS)
143    {
144        KEEP(*(.loader_param))
145    } > xSPI0_CS0_SPACE
146    .flash_contents FLASH_CONTENTS_ADDRESS : AT (FLASH_CONTENTS_ADDRESS)
147    {
148        _mloader_text = .;
149        . = . + (_loader_text_end - _loader_text_start);
150        _mloader_data = .;
151        . = . + (_loader_data_end - _loader_data_start);
152        _mfvector = .;
153        . = . + (_fvector_end - _fvector_start);
154        _mtext = .;
155        . = . + (_text_end - _text_start);
156        _mdummy = .;
157        . = . + (_dummy_end - _dummy_start);
158        _mdata = .;
159        . = . + (_data_end - _data_start);
160        _mdata_noncache = .;
161        . = . + (_data_noncache_end - _data_noncache_start);
162        flash_contents_end = .;
163    } > xSPI0_CS0_SPACE
164    .loader_text LOADER_TEXT_ADDRESS : AT (_mloader_text)
165    {
166        _loader_text_start = .;
167        *(.loader_text)
168        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.text*)
169        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.text*)
170        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.text*)
171        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.text*)
172        build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.text*)
173        build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
174        build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
175        build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
176        build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
177        build/rzn/fsp/src/r_ioport/r_ioport.o(.text*)
178        KEEP(*(.warm_start))
179        . = . + (512 - ((. - _loader_text_start) % 512));
180        _loader_text_end = .;
181    } > LOADER_STACK
182    .loader_data : AT (_mloader_data)
183    {
184        _loader_data_start = .;
185        __loader_data_start = .;
186        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.data*)
187        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.rodata*)
188        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.data*)
189        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.data*)
190        build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.data*)
191        build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
192        build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
193        build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
194        build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
195        build/rzn/fsp/src/r_ioport/r_ioport.o(.data*)
196        . = ALIGN(4);
197        __loader_data_end = .;
198        __loader_bss_start = .;
199        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.bss*)
200        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.bss*)
201        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.bss*)
202        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.bss*)
203        build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.bss*)
204        build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
205        build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
206        build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
207        build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
208        build/rzn/fsp/src/r_ioport/r_ioport.o(.bss*)
209        build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
210        build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(COMMON)
211        build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
212        build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
213        build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
214        build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
215        build/rzn/fsp/src/r_ioport/r_ioport.o(.COMMON)
216        . = ALIGN(4);
217        __loader_bss_end = . ;
218        _loader_data_end = .;
219    } > LOADER_STACK
220    .intvec INTVEC_ADDRESS : AT (_mfvector)
221    {
222        _fvector_start = .;
223        KEEP(*(.intvec))
224        _fvector_end = .;
225    } > RAM
226    .text TEXT_ADDRESS : AT (_mtext)
227    {
228        _text_start = .;
229        *(.text*)
230
231        KEEP(*(.reset_handler))
232        KEEP(*(.init))
233        KEEP(*(.fini))
234
235        /* .ctors */
236        *crtbegin.o(.ctors)
237        *crtbegin?.o(.ctors)
238        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
239        *(SORT(.ctors.*))
240        *(.ctors)
241        _ctor_end = .;
242
243        /* .dtors */
244        *crtbegin.o(.dtors)
245        *crtbegin?.o(.dtors)
246        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
247        *(SORT(.dtors.*))
248        *(.dtors)
249        _dtor_end = .;
250
251        /* section information for utest */
252        . = ALIGN(4);
253        __rt_utest_tc_tab_start = .;
254        KEEP(*(UtestTcTab))
255        __rt_utest_tc_tab_end = .;
256
257        /* section information for finsh shell */
258        . = ALIGN(4);
259        __fsymtab_start = .;
260        KEEP(*(FSymTab))
261        __fsymtab_end = .;
262
263        . = ALIGN(4);
264        __vsymtab_start = .;
265        KEEP(*(VSymTab))
266        __vsymtab_end = .;
267
268        /* section information for initial. */
269        . = ALIGN(4);
270        __rt_init_start = .;
271        KEEP(*(SORT(.rti_fn*)))
272        __rt_init_end = .;
273
274        /* new GCC version uses .init_array */
275        PROVIDE(__ctors_start__ = .);
276        KEEP (*(SORT(.init_array.*)))
277        KEEP (*(.init_array))
278        PROVIDE(__ctors_end__ = .);
279
280        . = ALIGN(4);
281        KEEP(*(FalPartTable))
282
283        KEEP(*(.eh_frame*))
284    } > RAM
285    .rvectors :
286    {
287        _rvectors_start = .;
288        KEEP(*(.rvectors))
289        _rvectors_end = .;
290    } > RAM
291    .ARM.extab :
292    {
293        *(.ARM.extab* .gnu.linkonce.armextab.*)
294    } > RAM
295    __exidx_start = .;
296    .ARM.exidx :
297    {
298        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
299    } > RAM
300    __exidx_end = .;
301    .got :
302    {
303        *(.got)
304        *(.got.plt)
305        . = ALIGN(4);
306        _text_end = .;
307    } > RAM
308    .dummy _fvector_end : AT (_mdummy)
309    {
310        _dummy_start = .;
311        KEEP(*(.dummy));
312        _dummy_end = .;
313    } > DUMMY
314    .data :  AT (_mdata)
315    {
316        _data_start = .;
317
318        *(vtable)
319        *(.data.*)
320        *(.data)
321
322        *(.rodata*)
323        _erodata = .;
324
325        . = ALIGN(4);
326        /* preinit data */
327        PROVIDE_HIDDEN (__preinit_array_start = .);
328        KEEP(*(.preinit_array))
329        PROVIDE_HIDDEN (__preinit_array_end = .);
330
331        . = ALIGN(4);
332        /* init data */
333        PROVIDE_HIDDEN (__init_array_start = .);
334        KEEP(*(SORT(.init_array.*)))
335        KEEP(*(.init_array))
336        PROVIDE_HIDDEN (__init_array_end = .);
337
338        . = ALIGN(4);
339        /* finit data */
340        PROVIDE_HIDDEN (__fini_array_start = .);
341        KEEP(*(SORT(.fini_array.*)))
342        KEEP(*(.fini_array))
343        PROVIDE_HIDDEN (__fini_array_end = .);
344
345        KEEP(*(.jcr*))
346
347        . = ALIGN(4);
348
349        /* All data end */
350        _data_end = .;
351    } > RAM
352    .bss :
353    {
354        . = ALIGN(4);
355        __bss_start__ = .;
356        _bss = .;
357        *(.bss*)
358        *(COMMON)
359        . = ALIGN(4);
360        __bss_end__ = .;
361        _ebss = .;
362        _end = .;
363    } > RAM
364    .heap (NOLOAD) :
365    {
366        . = ALIGN(8);
367        __HeapBase = .;
368        /* Place the STD heap here. */
369        KEEP(*(.heap))
370        __HeapLimit = .;
371    } > RAM
372    .thread_stack (NOLOAD):
373    {
374        . = ALIGN(8);
375        __ThreadStackBase = .;
376        /* Place the Thread stacks here. */
377        KEEP(*(.stack*))
378        __ThreadStackLimit = .;
379    } > RAM
380    .sys_stack (NOLOAD) :
381    {
382        . = ALIGN(8);
383        __SysStackBase = .;
384        /* Place the sys_stack here. */
385        KEEP(*(.sys_stack))
386        __SysStackLimit = .;
387    } > LOADER_STACK
388    .svc_stack (NOLOAD) :
389    {
390        . = ALIGN(8);
391        __SvcStackBase = .;
392        /* Place the svc_stack here. */
393        KEEP(*(.svc_stack))
394        __SvcStackLimit = .;
395    } > LOADER_STACK
396    .irq_stack (NOLOAD) :
397    {
398        . = ALIGN(8);
399        __IrqStackBase = .;
400        /* Place the irq_stack here. */
401        KEEP(*(.irq_stack))
402        __IrqStackLimit = .;
403    } > LOADER_STACK
404    .fiq_stack (NOLOAD) :
405    {
406        . = ALIGN(8);
407        __FiqStackBase = .;
408        /* Place the fiq_stack here. */
409        KEEP(*(.fiq_stack))
410        __FiqStackLimit = .;
411    } > LOADER_STACK
412    .und_stack (NOLOAD) :
413    {
414        . = ALIGN(8);
415        __UndStackBase = .;
416        /* Place the und_stack here. */
417        KEEP(*(.und_stack))
418        __UndStackLimit = .;
419    } > LOADER_STACK
420    .abt_stack (NOLOAD) :
421    {
422        . = ALIGN(8);
423        __AbtStackBase = .;
424        /* Place the abt_stack here. */
425        KEEP(*(.abt_stack))
426        __AbtStackLimit = .;
427    } > LOADER_STACK
428    .data_noncache DATA_NONCACHE_START : AT (_mdata_noncache)
429    {
430        . = ALIGN(4);
431        _data_noncache_start = .;
432        KEEP(*(.data_noncache*))
433        _data_noncache_end = .;
434    } > DATA_NONCACHE
435    .dmac_link_mode DMAC_LINK_MODE_START : AT (DMAC_LINK_MODE_START)
436    {
437        . = ALIGN(4);
438        _DmacLinkMode_start = .;
439        KEEP(*(.dmac_link_mode*))
440        _DmacLinkMode_end = .;
441    } > DMAC_LINK_MODE
442    .shared_noncache_buffer SHARED_NONCACHE_BUFFER_START (NOLOAD) : AT (SHARED_NONCACHE_BUFFER_START)
443    {
444        . = ALIGN(32);
445        _sncbuffer_start = .;
446        KEEP(*(.shared_noncache_buffer*))
447        _sncbuffer_end = .;
448    } > SHARED_NONCACHE_BUFFER
449    .noncache_buffer NONCACHE_BUFFER_START (NOLOAD) : AT (NONCACHE_BUFFER_START)
450    {
451        . = ALIGN(32);
452        _ncbuffer_start = .;
453        KEEP(*(.noncache_buffer*))
454        _ncbuffer_end = .;
455    } > NONCACHE_BUFFER
456}
457