1 /** @file reg_dcc.h
2 *   @brief DCC Register Layer Header File
3 *   @date 29.May.2013
4 *   @version 03.05.02
5 *
6 *   This file contains:
7 *   - Definitions
8 *   - Types
9 *   - Interface Prototypes
10 *   .
11 *   which are relevant for the DCC driver.
12 */
13 
14 /* (c) Texas Instruments 2009-2013, All rights reserved. */
15 
16 #ifndef __REG_DCC_H__
17 #define __REG_DCC_H__
18 
19 #include "sys_common.h"
20 
21 
22 
23 /* USER CODE BEGIN (0) */
24 /* USER CODE END */
25 
26 /* Dcc Register Frame Definition */
27 /** @struct dccBase
28 *   @brief DCC Base Register Definition
29 *
30 *   This structure is used to access the DCC module registers.
31 */
32 /** @typedef dccBASE_t
33 *   @brief DCC Register Frame Type Definition
34 *
35 *   This type is used to access the DCC Registers.
36 */
37 typedef volatile struct dccBase
38 {
39     uint32 GCTRL;      	/**< 0x0000: DCC Control Register		*/
40     uint32 REV;      		/**< 0x0004: DCC Revision Id Register 	*/
41     uint32 CNT0SEED;    	/**< 0x0008: DCC Counter0 Seed Register	*/
42     uint32 VALID0SEED;    /**< 0x000C: DCC Valid0 Seed Register 	*/
43     uint32 CNT1SEED;		/**< 0x0010: DCC Counter1 Seed Register 	*/
44     uint32 STAT; 			/**< 0x0014: DCC Status Register 		*/
45     uint32 CNT0;    		/**< 0x0018: DCC Counter0 Value Register 	*/
46     uint32 VALID0;    	/**< 0x001C: DCC Valid0 Value Register 	*/
47     uint32 CNT1;      	/**< 0x0020: DCC Counter1 Value Register	*/
48     uint32 CLKSRC1;   	/**< 0x0024: DCC Counter1 Clock Source Selection Register 	*/
49     uint32 CLKSRC0;   	/**< 0x0028: DCC Counter0 Clock Source Selection Register 	*/
50 } dccBASE_t;
51 
52 
53 /** @def dccREG1
54 *   @brief DCC1 Register Frame Pointer
55 *
56 *   This pointer is used by the DCC driver to access the dcc2 module registers.
57 */
58 #define dccREG1   ((dccBASE_t *)0xFFFFEC00U)
59 
60 
61 /** @def dccREG2
62 *   @brief DCC2 Register Frame Pointer
63 *
64 *   This pointer is used by the DCC driver to access the dcc2 module registers.
65 */
66 #define dccREG2   ((dccBASE_t *)0xFFFFF400U)
67 
68 /* USER CODE BEGIN (1) */
69 /* USER CODE END */
70 
71 
72 #endif
73