1 /** @file reg_pinmux.h 2 * @brief PINMUX Register Layer Header File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 * This file contains: 7 * - Definitions 8 * - Types 9 * - Interface Prototypes 10 * . 11 * which are relevant for the PINMUX driver. 12 */ 13 14 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 15 16 #ifndef __REG_PINMUX_H__ 17 #define __REG_PINMUX_H__ 18 19 #include "sys_common.h" 20 21 22 /* USER CODE BEGIN (0) */ 23 /* USER CODE END */ 24 25 /* IOMM Revision and Boot Register */ 26 #define REVISION_REG (*(volatile uint32 *)0xFFFFEA00U) 27 #define ENDIAN_REG (*(volatile uint32 *)0xFFFFEA20U) 28 29 /* IOMM Error and Fault Registers */ 30 /** @struct iommErrFault 31 * @brief IOMM Error and Fault Register Definition 32 * 33 * This structure is used to access the IOMM Error and Fault registers. 34 */ 35 typedef volatile struct iommErrFault 36 { 37 uint32 ERR_RAW_STATUS_REG; /* Error Raw Status / Set Register */ 38 uint32 ERR_ENABLED_STATUS_REG; /* Error Enabled Status / Clear Register */ 39 uint32 ERR_ENABLE_REG; /* Error Signaling Enable Register */ 40 uint32 ERR_ENABLE_CLR_REG; /* Error Signaling Enable Clear Register */ 41 uint32 rsvd; /* Reserved */ 42 uint32 FAULT_ADDRESS_REG; /* Fault Address Register */ 43 uint32 FAULT_STATUS_REG; /* Fault Status Register */ 44 uint32 FAULT_CLEAR_REG; /* Fault Clear Register */ 45 } iommErrFault_t; 46 /* Pinmux Register Frame Definition */ 47 /** @struct pinMuxKicker 48 * @brief Pin Muxing Kicker Register Definition 49 * 50 * This structure is used to access the Pin Muxing Kicker registers. 51 */ 52 typedef volatile struct pinMuxKicker 53 { 54 uint32 KICKER0; /* kicker 0 register */ 55 uint32 KICKER1; /* kicker 1 register */ 56 } pinMuxKICKER_t; 57 58 /** @struct pinMuxBase 59 * @brief PINMUX Register Definition 60 * 61 * This structure is used to access the PINMUX module registers. 62 */ 63 /** @typedef pinMuxBASE_t 64 * @brief PINMUX Register Frame Type Definition 65 * 66 * This type is used to access the PINMUX Registers. 67 */ 68 typedef volatile struct pinMuxBase 69 { 70 uint32 PINMMR0; /**< 0xEB10 Pin Mux 0 register*/ 71 uint32 PINMMR1; /**< 0xEB14 Pin Mux 1 register*/ 72 uint32 PINMMR2; /**< 0xEB18 Pin Mux 2 register*/ 73 uint32 PINMMR3; /**< 0xEB1C Pin Mux 3 register*/ 74 uint32 PINMMR4; /**< 0xEB20 Pin Mux 4 register*/ 75 uint32 PINMMR5; /**< 0xEB24 Pin Mux 5 register*/ 76 uint32 PINMMR6; /**< 0xEB28 Pin Mux 6 register*/ 77 uint32 PINMMR7; /**< 0xEB2C Pin Mux 7 register*/ 78 uint32 PINMMR8; /**< 0xEB30 Pin Mux 8 register*/ 79 uint32 PINMMR9; /**< 0xEB34 Pin Mux 9 register*/ 80 uint32 PINMMR10; /**< 0xEB38 Pin Mux 10 register*/ 81 uint32 PINMMR11; /**< 0xEB3C Pin Mux 11 register*/ 82 uint32 PINMMR12; /**< 0xEB40 Pin Mux 12 register*/ 83 uint32 PINMMR13; /**< 0xEB44 Pin Mux 13 register*/ 84 uint32 PINMMR14; /**< 0xEB48 Pin Mux 14 register*/ 85 uint32 PINMMR15; /**< 0xEB4C Pin Mux 15 register*/ 86 uint32 PINMMR16; /**< 0xEB50 Pin Mux 16 register*/ 87 uint32 PINMMR17; /**< 0xEB54 Pin Mux 17 register*/ 88 uint32 PINMMR18; /**< 0xEB58 Pin Mux 18 register*/ 89 uint32 PINMMR19; /**< 0xEB5C Pin Mux 19 register*/ 90 uint32 PINMMR20; /**< 0xEB60 Pin Mux 20 register*/ 91 uint32 PINMMR21; /**< 0xEB64 Pin Mux 21 register*/ 92 uint32 PINMMR22; /**< 0xEB68 Pin Mux 22 register*/ 93 uint32 PINMMR23; /**< 0xEB6C Pin Mux 23 register*/ 94 uint32 PINMMR24; /**< 0xEB70 Pin Mux 24 register*/ 95 uint32 PINMMR25; /**< 0xEB74 Pin Mux 25 register*/ 96 uint32 PINMMR26; /**< 0xEB78 Pin Mux 26 register*/ 97 uint32 PINMMR27; /**< 0xEB7C Pin Mux 27 register*/ 98 uint32 PINMMR28; /**< 0xEB80 Pin Mux 28 register*/ 99 uint32 PINMMR29; /**< 0xEB84 Pin Mux 29 register*/ 100 uint32 PINMMR30; /**< 0xEB88 Pin Mux 30 register*/ 101 }pinMuxBASE_t; 102 103 104 /** @def iommErrFaultReg 105 * @brief IOMM Error Fault Register Frame Pointer 106 * 107 * This pointer is used to control IOMM Error and Fault across the device. 108 */ 109 #define iommErrFaultReg ((iommErrFault_t *) 0xFFFFEAEOU) 110 111 /** @def kickerReg 112 * @brief Pin Muxing Kicker Register Frame Pointer 113 * 114 * This pointer is used to enable and disable muxing accross the device. 115 */ 116 #define kickerReg ((pinMuxKICKER_t *) 0xFFFFEA38U) 117 118 /** @def pinMuxReg 119 * @brief Pin Muxing Control Register Frame Pointer 120 * 121 * This pointer is used to set the muxing registers accross the device. 122 */ 123 #define pinMuxReg ((pinMuxBASE_t *) 0xFFFFEB10U) 124 125 /* USER CODE BEGIN (1) */ 126 /* USER CODE END */ 127 128 129 #endif 130