1 /** @file sys_pmu.h 2 * @brief System Pmu Header File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 * This file contains: 7 * - Pmu Interface Functions 8 * . 9 * which are relevant for the performance monitor unit driver. 10 */ 11 12 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 13 14 #ifndef __SYS_PMU_H__ 15 #define __SYS_PMU_H__ 16 17 #include "sys_common.h" 18 19 /* USER CODE BEGIN (0) */ 20 /* USER CODE END */ 21 22 /** @def pmuCOUNTER0 23 * @brief pmu event counter 0 24 * 25 * Alias for pmu event counter 0 26 */ 27 #define pmuCOUNTER0 0x00000001U 28 29 /** @def pmuCOUNTER1 30 * @brief pmu event counter 1 31 * 32 * Alias for pmu event counter 1 33 */ 34 #define pmuCOUNTER1 0x00000002U 35 36 /** @def pmuCOUNTER2 37 * @brief pmu event counter 2 38 * 39 * Alias for pmu event counter 2 40 */ 41 #define pmuCOUNTER2 0x00000004U 42 43 /** @def pmuCYCLE_COUNTER 44 * @brief pmu cycle counter 45 * 46 * Alias for pmu event counter 47 */ 48 #define pmuCYCLE_COUNTER 0x80000000U 49 50 /** @enum pmuEvent 51 * @brief pmu event 52 * 53 * Alias for pmu event counter increment source 54 */ 55 enum pmuEvent 56 { 57 PMU_INST_CACHE_MISS = 0x01U, 58 PMU_DATA_CACHE_MISS = 0x03U, 59 PMU_DATA_CACHE_ACCESS = 0x04U, 60 PMU_DATA_READ_ARCH_EXECUTED = 0x06U, 61 PMU_DATA_WRITE_ARCH_EXECUTED = 0x07U, 62 PMU_INST_ARCH_EXECUTED = 0x08U, 63 PMU_EXCEPTION_TAKEN = 0x09U, 64 PMU_EXCEPTION_RETURN_ARCH_EXECUTED = 0x0AU, 65 PMU_CHANGE_TO_CONTEXT_ID_EXECUTED = 0x0BU, 66 PMU_SW_CHANGE_OF_PC_ARCH_EXECUTED = 0x0CU, 67 PMU_BRANCH_IMM_INST_ARCH_EXECUTED = 0x0DU, 68 PMU_PROC_RETURN_ARCH_EXECUTED = 0x0EU, 69 PMU_UNALIGNED_ACCESS_ARCH_EXECUTED = 0x0FU, 70 PMU_BRANCH_MISSPREDICTED = 0x10U, 71 PMU_CYCLE_COUNT = 0x11U, 72 PMU_PREDICTABLE_BRANCHES = 0x12U, 73 PMU_INST_BUFFER_STALL = 0x40U, 74 PMU_DATA_DEPENDENCY_INST_STALL = 0x41U, 75 PMU_DATA_CACHE_WRITE_BACK = 0x42U, 76 PMU_EXT_MEMORY_REQUEST = 0x43U, 77 PMU_LSU_BUSY_STALL = 0x44U, 78 PMU_FORCED_DRAIN_OFSTORE_BUFFER = 0x45U, 79 PMU_FIQ_DISABLED_CYCLE_COUNT = 0x46U, 80 PMU_IRQ_DISABLED_CYCLE_COUNT = 0x47U, 81 PMU_ETMEXTOUT_0 = 0x48U, 82 PMU_ETMEXTOUT_1 = 0x49U, 83 PMU_INST_CACHE_TAG_ECC_ERROR = 0x4AU, 84 PMU_INST_CACHE_DATA_ECC_ERROR = 0x4BU, 85 PMU_DATA_CACHE_TAG_ECC_ERROR = 0x4CU, 86 PMU_DATA_CACHE_DATA_ECC_ERROR = 0x4DU, 87 PMU_TCM_FATAL_ECC_ERROR_PREFETCH = 0x4EU, 88 PMU_TCM_FATAL_ECC_ERROR_LOAD_STORE = 0x4FU, 89 PMU_STORE_BUFFER_MERGE = 0x50U, 90 PMU_LSU_STALL_STORE_BUFFER_FULL = 0x51U, 91 PMU_LSU_STALL_STORE_QUEUE_FULL = 0x52U, 92 PMU_INTEGER_DIV_EXECUTED = 0x53U, 93 PMU_STALL_INTEGER_DIV = 0x54U, 94 PMU_PLD_INST_LINE_FILL = 0x55U, 95 PMU_PLD_INST_NO_LINE_FILL = 0x56U, 96 PMU_NON_CACHEABLE_ACCESS_AXI_MASTER = 0x57U, 97 PMU_INST_CACHE_ACCESS = 0x58U, 98 PMU_DOUBLE_DATA_CACHE_ISSUE = 0x59U, 99 PMU_DUAL_ISSUE_CASE_A = 0x5AU, 100 PMU_DUAL_ISSUE_CASE_B1_B2_F2_F2D = 0x5BU, 101 PMU_DUAL_ISSUE_OTHER = 0x5CU, 102 PMU_DP_FLOAT_INST_EXCECUTED = 0x5DU, 103 PMU_DUAL_ISSUED_PAIR_INST_ARCH_EXECUTED = 0x5EU, 104 PMU_DATA_CACHE_DATA_FATAL_ECC_ERROR = 0x60U, 105 PMU_DATA_CACHE_TAG_FATAL_ECC_ERROR = 0x61U, 106 PMU_PROCESSOR_LIVE_LOCK = 0x62U, 107 PMU_ATCM_MULTI_BIT_ECC_ERROR = 0x64U, 108 PMU_B0TCM_MULTI_BIT_ECC_ERROR = 0x65U, 109 PMU_B1TCM_MULTI_BIT_ECC_ERROR = 0x66U, 110 PMU_ATCM_SINGLE_BIT_ECC_ERROR = 0x67U, 111 PMU_B0TCM_SINGLE_BIT_ECC_ERROR = 0x68U, 112 PMU_B1TCM_SINGLE_BIT_ECC_ERROR = 0x69U, 113 PMU_TCM_COR_ECC_ERROR_LOAD_STORE = 0x6AU, 114 PMU_TCM_COR_ECC_ERROR_PREFETCH = 0x6BU, 115 PMU_TCM_FATAL_ECC_ERROR_AXI_SLAVE = 0x6CU, 116 PMU_TCM_COR_ECC_ERROR_AXI_SLAVE = 0x6DU 117 }; 118 119 /** @fn void _pmuInit_(void) 120 * @brief Initialize Performance Monitor Unit 121 */ 122 void _pmuInit_(void); 123 124 /** @fn void _pmuEnableCountersGlobal_(void) 125 * @brief Enable and reset cycle counter and all 3 event counters 126 */ 127 void _pmuEnableCountersGlobal_(void); 128 129 /** @fn void _pmuDisableCountersGlobal_(void) 130 * @brief Disable cycle counter and all 3 event counters 131 */ 132 void _pmuDisableCountersGlobal_(void); 133 134 /** @fn void _pmuResetCycleCounter_(void) 135 * @brief Reset cycle counter 136 */ 137 void _pmuResetCycleCounter_(void); 138 139 /** @fn void _pmuResetEventCounters_(void) 140 * @brief Reset event counters 0-2 141 */ 142 void _pmuResetEventCounters_(void); 143 144 /** @fn void _pmuResetCounters_(void) 145 * @brief Reset cycle counter and event counters 0-2 146 */ 147 void _pmuResetCounters_(void); 148 149 /** @fn void _pmuStartCounters_(uint32 counters) 150 * @brief Starts selected counters 151 * @param[in] counters - Counter mask 152 */ 153 void _pmuStartCounters_(uint32 counters); 154 155 /** @fn void _pmuStopCounters_(uint32 counters) 156 * @brief Stops selected counters 157 * @param[in] counters - Counter mask 158 */ 159 void _pmuStopCounters_(uint32 counters); 160 161 /** @fn void _pmuSetCountEvent_(uint32 counter, uint32 event) 162 * @brief Set event counter count event 163 * @param[in] counter - Counter select 0..2 164 * @param[in] event - Count event 165 */ 166 void _pmuSetCountEvent_(uint32 counter, uint32 event); 167 168 /** @fn uint32 _pmuGetCycleCount_(void) 169 * @brief Returns current cycle counter value 170 * 171 * @return cycle count. 172 */ 173 uint32 _pmuGetCycleCount_(void); 174 175 /** @fn uint32 _pmuGetEventCount_(uint32 counter) 176 * @brief Returns current event counter value 177 * @param[in] counter - Counter select 0..2 178 * 179 * @return event counter count. 180 */ 181 uint32 _pmuGetEventCount_(uint32 counter); 182 183 /** @fn uint32 _pmuGetOverflow_(void) 184 * @brief Returns current overflow register and clear flags 185 * 186 * @return overflow flags. 187 */ 188 uint32 _pmuGetOverflow_(void); 189 190 191 #endif 192