1 /**
2   * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
3   *
4   * SPDX-License-Identifier: Apache-2.0
5   ******************************************************************************
6   * @file    drv_clock.h
7   * @version V0.1
8   * @brief   clock interface
9   *
10   * Change Logs:
11   * Date           Author          Notes
12   * 2019-07-11     Elaine.Zhang      first implementation
13   *
14   ******************************************************************************
15   */
16 
17 #ifndef _DRV_CLOCK_H_
18 #define _DRV_CLOCK_H_
19 
20 #include <hal_base.h>
21 
22 #ifdef RT_CONSOLE_DEVICE_NAME
23 #define RT_CONSOLE_DEVICE_UART(ID) \
24     ((strcmp(RT_CONSOLE_DEVICE_NAME, "uart"#ID)) ? 0:1)
25 #else
26 #define RT_CONSOLE_DEVICE_UART(ID) 0
27 #endif
28 
29 #define INIT_CLK(NAME, ID, RATE)                     \
30     { .name = NAME, .clk_id = ID, .init_rate = RATE, }
31 
32 struct clk_gate
33 {
34     uint32_t gate_id;
35     int enable_count;
36     int ref_count;
37     rt_slist_t node;
38 };
39 
40 struct clk_init
41 {
42     const char *name;
43     uint32_t clk_id;
44     uint32_t init_rate;
45 };
46 
47 struct clk_unused
48 {
49     uint32_t is_pmucru : 1;
50     uint32_t gate_con : 31;
51     uint32_t gate_val;
52 };
53 
54 struct pd
55 {
56     uint32_t pd_id;
57     int enable_count;
58     int ref_count;
59     rt_slist_t node;
60 };
61 
62 /**
63  * @brief  clk set enable by id.
64  * @param  gate_id: gate id.
65  * @retval RT_EOK: clk set enable success.
66  * @retval -RT_ERROR: clk set enable failed.
67  */
clk_enable_by_id(int gate_id)68 static inline rt_err_t clk_enable_by_id(int gate_id)
69 {
70 #ifdef HAL_CRU_MODULE_ENABLED
71     return (HAL_CRU_ClkEnable(gate_id) == HAL_OK) ? RT_EOK : -RT_ERROR;
72 #else
73     return RT_EOK;
74 #endif
75 }
76 
77 /**
78  * @brief  clk set disable by id.
79  * @param  gate_id: gate id.
80  * @retval RT_EOK: clk set disable success.
81  * @retval -RT_ERROR: clk set disable failed.
82  */
clk_disable_by_id(int gate_id)83 static inline rt_err_t clk_disable_by_id(int gate_id)
84 {
85 #ifdef HAL_CRU_MODULE_ENABLED
86     return (HAL_CRU_ClkDisable(gate_id) == HAL_OK) ? RT_EOK : -RT_ERROR;
87 #else
88     return RT_EOK;
89 #endif
90 }
91 
92 struct clk_gate *get_clk_gate_from_id(int gate_id);
93 void put_clk_gate(struct clk_gate *gate);
94 rt_err_t clk_enable(struct clk_gate *gate);
95 rt_err_t clk_disable(struct clk_gate *gate);
96 int clk_is_enabled(struct clk_gate *gate);
97 uint32_t clk_get_rate(eCLOCK_Name clk_id);
98 rt_err_t clk_set_rate(eCLOCK_Name clk_id, uint32_t rate);
99 #if defined(RT_USING_PMU)
100 struct pd *get_pd_from_id(ePD_Id pd_id);
101 void put_pd(struct pd *power);
102 rt_err_t pd_on(struct pd *power);
103 rt_err_t pd_off(struct pd *power);
104 #endif
105 void clk_init(const struct clk_init *clk_inits, bool clk_dump);
106 void clk_disable_unused(const struct clk_unused *clks_unused);
107 
108 #endif // _DRV_CLOCK_H_
109