1 /**
2 *
3 * \file
4 *
5 * \brief SAM Advanced Encryption Standard driver.
6 *
7 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
8 *
9 * \asf_license_start
10 *
11 * \page License
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions are met:
15 *
16 * 1. Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above copyright notice,
20 * this list of conditions and the following disclaimer in the documentation
21 * and/or other materials provided with the distribution.
22 *
23 * 3. The name of Atmel may not be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * 4. This software may only be redistributed and used in connection with an
27 * Atmel microcontroller product.
28 *
29 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
32 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
33 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 *
41 * \asf_license_stop
42 *
43 */
44 /*
45 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
46 */
47
48 #ifndef AES_H_INCLUDED
49 #define AES_H_INCLUDED
50
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54
55 /**
56 * \defgroup asfdoc_sam0_drivers_aes_group SAM Advanced Encryption Standard (AES) Driver
57 *
58 * This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration
59 * and management of the device's Advanced Encryption Standard functionality. The following
60 * driver API modes are covered by this manual:
61 *
62 * - Polled APIs
63 * - Callback APIs
64 *
65 * The Advanced Encryption Standard module supports all five confidentiality
66 * modes of operation for symmetrical key block cipher algorithms (as specified
67 * in the NIST Special Publication 800-38A Recommendation):
68 * - Electronic Code Book (ECB)
69 * - Cipher Block Chaining (CBC)
70 * - Output Feedback (OFB)
71 * - Cipher Feedback (CFB)
72 * - Counter (CTR)
73 *
74 * The following peripheral is used by this module:
75 * - AES (Advanced Encryption Standard)
76 *
77 * The following devices can use this module:
78 * - Atmel | SMART SAM L21
79 * - Atmel | SMART SAM L22
80 *
81 * The outline of this documentation is as follows:
82 * - \ref asfdoc_sam0_drivers_aes_prerequisites
83 * - \ref asfdoc_sam0_drivers_aes_module_overview
84 * - \ref asfdoc_sam0_drivers_aes_special_considerations
85 * - \ref asfdoc_sam0_drivers_aes_extra_info
86 * - \ref asfdoc_sam0_drivers_aes_examples
87 * - \ref asfdoc_sam0_drivers_aes_api_overview
88 *
89 *
90 * \section asfdoc_sam0_drivers_aes_prerequisites Prerequisites
91 *
92 * There are no prerequisites for this module.
93 *
94 *
95 * \section asfdoc_sam0_drivers_aes_module_overview Module Overview
96 *
97 * The Advanced Encryption Standard (AES) is a specification for the encryption of
98 * electronic data established by the U.S. National Institute of Standards and
99 * Technology (NIST) in 2001. It is compliant with the American FIPS
100 * (Federal Information Processing Standard) Publication 197 specification.
101 *
102 * The AES supports all five confidentiality modes of operation for symmetrical
103 * key block cipher algorithms (as specified in the NIST Special Publication
104 * 800-38A Recommendation):
105 * - Electronic Code Book (ECB)
106 * - Cipher Block Chaining (CBC)
107 * - Output Feedback (OFB)
108 * - Cipher Feedback (CFB)
109 * - Counter (CTR)
110 *
111 * Data transfers both to and from the AES module can occur using the peripheral
112 * DMA controller channels, thus minimizing processor intervention for
113 * large data buffer transfers.
114 *
115 * As soon as the initialization vector, the input data and the key are
116 * configured, the encryption/decryption process may be started. Once the
117 * process has completed the encrypted/decrypted data can be read out via
118 * registers or through DMA channels.
119 *
120 * \subsection asfdoc_sam0_drivers_aes_module_overview_en_de Encryption and Decryption
121 * The AES is capable of using cryptographic keys of 128/192/256 bits to
122 * encrypt and decrypt data in blocks of 128 bits. In Cipher Feedback Mode (CFB),
123 * five data sizes are possible (8, 16, 32, 64, or 128 bits).
124 *
125 * The input to the encryption processes of the CBC, CFB, and OFB modes includes,
126 * in addition to the plaintext, a 128-bit data block called the Initialization
127 * Vector (IV). The Initialization Vector is used in the initial step in the
128 * encryption of a message and in the corresponding decryption of the message.
129 *
130 * There are three encryption/decryption start modes:
131 * - Manual Mode: Start encryption/decryption manually
132 * - Auto Start Mode: Once the correct number of input data registers is written,
133 * processing is automatically started, DMA operation uses this mode
134 * - Last Output Data Mode (LOD): This mode is used to generate message
135 * authentication code (MAC) on data in CCM mode of operation
136 *
137 * \subsection asfdoc_sam0_drivers_aes_module_overview_hardware_countermeasures Hardware Countermeasures
138 * The AES module features four types of hardware countermeasures that are
139 * useful for protecting data against differential power analysis attacks:
140 * - Type 1: Randomly add one cycle to data processing
141 * - Type 2: Randomly add one cycle to data processing (other version)
142 * - Type 3: Add a random number of clock cycles to data processing, subject to
143 * a maximum of 11/13/15 clock cycles for key sizes of 128/192/256 bits
144 * - Type 4: Add random spurious power consumption during data processing
145 *
146 * \subsection asfdoc_sam0_drivers_aes_module_overview_gcm Galois Counter Mode (GCM)
147 * GCM is comprised of the AES engine in CTR mode along with a universal hash
148 * function (GHASH engine) that is defined over a binary Galois field to produce
149 * a message authentication tag. The GHASH engine processes data packets after the
150 * AES operation. GCM provides assurance of the confidentiality of data through the
151 * AES Counter mode of operation for DRAFT 920 encryption. Authenticity of the
152 * confidential data is assured through the GHASH engine. Refer to the NIST Special
153 * Publication 800-38D Recommendation for more complete information.
154 *
155 * \section asfdoc_sam0_drivers_aes_special_considerations Special Considerations
156 *
157 * There are no special considerations for this module.
158 *
159 * \section asfdoc_sam0_drivers_aes_extra_info Extra Information
160 *
161 * For extra information, see \ref asfdoc_sam0_drivers_aes_extra. This includes:
162 * - \ref asfdoc_sam0_drivers_aes_extra_acronyms
163 * - \ref asfdoc_sam0_drivers_aes_extra_dependencies
164 * - \ref asfdoc_sam0_drivers_aes_extra_errata
165 * - \ref asfdoc_sam0_drivers_aes_extra_history
166 *
167 * \section asfdoc_sam0_drivers_aes_examples Examples
168 *
169 * For a list of examples related to this driver, see
170 * \ref asfdoc_sam0_drivers_aes_exqsg.
171 *
172 *
173 * \section asfdoc_sam0_drivers_aes_api_overview API Overview
174 * @{
175 */
176
177 #include <compiler.h>
178 #include <system.h>
179
180 #ifdef __cplusplus
181 extern "C" {
182 #endif
183
184 /** AES processing mode. */
185 enum aes_encrypt_mode {
186 AES_DECRYPTION = 0, /**< Decryption of data will be performed */
187 AES_ENCRYPTION, /**< Encryption of data will be performed */
188 };
189
190 /** AES cryptographic key size. */
191 enum aes_key_size {
192 AES_KEY_SIZE_128 = 0, /**< AES key size is 128-bit */
193 AES_KEY_SIZE_192, /**< AES key size is 192-bit */
194 AES_KEY_SIZE_256, /**< AES key size is 256-bit */
195 };
196
197 /** AES start mode. */
198 enum aes_start_mode {
199 AES_MANUAL_START = 0, /**< Manual start mode */
200 AES_AUTO_START, /**< Auto start mode */
201 };
202
203 /** AES operation mode. */
204 enum aes_operation_mode {
205 AES_ECB_MODE = 0, /**< Electronic Codebook (ECB) */
206 AES_CBC_MODE, /**< Cipher Block Chaining (CBC) */
207 AES_OFB_MODE, /**< Output Feedback (OFB) */
208 AES_CFB_MODE, /**< Cipher Feedback (CFB) */
209 AES_CTR_MODE, /**< Counter (CTR) */
210 AES_CCM_MODE, /**< Counter (CCM) */
211 AES_GCM_MODE, /**< Galois Counter Mode (GCM) */
212 };
213
214 /** AES Cipher FeedBack (CFB) size. */
215 enum aes_cfb_size {
216 AES_CFB_SIZE_128 = 0, /**< Cipher feedback data size is 128-bit */
217 AES_CFB_SIZE_64, /**< Cipher feedback data size is 64-bit */
218 AES_CFB_SIZE_32, /**< Cipher feedback data size is 32-bit */
219 AES_CFB_SIZE_16, /**< Cipher feedback data size is 16-bit */
220 AES_CFB_SIZE_8, /**< Cipher feedback data size is 8-bit */
221 };
222
223 /** AES countermeasure type */
224 enum aes_countermeature_type {
225 AES_COUNTERMEASURE_TYPE_disabled = 0x0, /**< Countermeasure type all disabled */
226 AES_COUNTERMEASURE_TYPE_1 = 0x01, /**< Countermeasure1 enabled */
227 AES_COUNTERMEASURE_TYPE_2 = 0x02, /**< Countermeasure2 enabled */
228 AES_COUNTERMEASURE_TYPE_3 = 0x04, /**< Countermeasure3 enabled */
229 AES_COUNTERMEASURE_TYPE_4 = 0x08, /**< Countermeasure4 enabled */
230 AES_COUNTERMEASURE_TYPE_ALL = 0x0F, /**< Countermeasure type all enabled */
231 };
232
233 /**
234 * \name Module Status Flags
235 *
236 * AES status flags, returned by \ref aes_get_status() and cleared by
237 * \ref aes_clear_status().
238 *
239 * @{
240 */
241
242 /** AES encryption complete.
243 */
244 #define AES_ENCRYPTION_COMPLETE (1UL << 0)
245
246 /** AES GF multiplication complete.
247 */
248 #define AES_GF_MULTI_COMPLETE (1UL << 1)
249 /** @} */
250
251
252 /** AES Configuration structure. */
253 struct aes_config {
254 /** AES data mode (decryption or encryption) */
255 enum aes_encrypt_mode encrypt_mode;
256 /** AES key size */
257 enum aes_key_size key_size;
258 /** Start mode */
259 enum aes_start_mode start_mode;
260 /** AES cipher operation mode*/
261 enum aes_operation_mode opmode;
262 /** Cipher feedback data size */
263 enum aes_cfb_size cfb_size;
264 /** Countermeasure type */
265 enum aes_countermeature_type ctype;
266 /** Enable XOR key */
267 bool enable_xor_key;
268 /** Enable key generation */
269 bool enable_key_gen;
270 /** Last output data mode enable/disable */
271 bool lod;
272 };
273
274 #if !defined(__DOXYGEN__)
275 /**
276 * \brief Device structure.
277 */
278 struct aes_module {
279 /** AES hardware module. */
280 Aes *hw;
281 /** AES cipher operation mode.*/
282 enum aes_operation_mode opmode;
283 /** AES key size. */
284 enum aes_key_size key_size;
285 /** Cipher feedback data size. */
286 enum aes_cfb_size cfb_size;
287 };
288 #endif
289
290 /**
291 * \name Configuration and Initialization
292 * @{
293 */
294 void aes_get_config_defaults(struct aes_config *const config);
295
296 void aes_set_config(struct aes_module *const module,
297 Aes *const hw,
298 struct aes_config *const config);
299
300 void aes_init(struct aes_module *const module,
301 Aes *const hw,
302 struct aes_config *const config);
303
304 /** @} */
305
306 /**
307 * \name Start, Enable, and Write
308 * @{
309 */
310
311 /**
312 * \brief Start a manual encryption/decryption process.
313 *
314 * \param[in] module Pointer to the AES software instance struct
315 */
aes_start(struct aes_module * const module)316 static inline void aes_start(struct aes_module *const module)
317 {
318 Assert(module);
319 Assert(module->hw);
320
321 module->hw->CTRLB.reg |= AES_CTRLB_START;
322 }
323 /**
324 * \brief Notifies the module that the next input data block
325 * is the beginning of a new message.
326 *
327 * \param[in] module Pointer to the AES software instance struct
328 *
329 */
aes_set_new_message(struct aes_module * const module)330 static inline void aes_set_new_message(struct aes_module *const module)
331 {
332 Assert(module);
333 Assert(module->hw);
334 module->hw->CTRLB.reg |= AES_CTRLB_NEWMSG;
335 }
336 /**
337 * \brief Clear the indication of the beginning for a new message
338 *
339 * \param[in] module Pointer to the AES software instance struct
340 *
341 */
aes_clear_new_message(struct aes_module * const module)342 static inline void aes_clear_new_message(struct aes_module *const module)
343 {
344 Assert(module);
345 Assert(module->hw);
346 module->hw->CTRLB.reg &= ~AES_CTRLB_NEWMSG;
347 }
348
349 void aes_enable(struct aes_module *const module);
350
351 void aes_disable(struct aes_module *const module);
352
353 void aes_write_key(struct aes_module *const module, const uint32_t *key);
354
355 void aes_write_init_vector(struct aes_module *const module, const uint32_t *vector);
356
357 void aes_write_input_data(struct aes_module *const module,
358 const uint32_t *p_input_data_buffer);
359
360 void aes_read_output_data(struct aes_module *const module,
361 uint32_t *p_output_data_buffer);
362
363 /**
364 * \brief Write AES random seed.
365 *
366 * \param[in] module Pointer to the AES software instance struct
367 * \param[in] seed Seed for the random number generator
368 */
aes_write_random_seed(struct aes_module * const module,uint32_t seed)369 static inline void aes_write_random_seed(struct aes_module *const module,
370 uint32_t seed)
371 {
372 Assert(module);
373 Assert(module->hw);
374
375 module->hw->RANDSEED.reg = seed;
376 }
377
378 /** @} */
379
380 /**
381 * \name Status Management
382 * @{
383 */
384
385 /**
386 * \brief Retrieves the current module status.
387 *
388 * Retrieves the status of the module, giving overall state information.
389 *
390 * \param[in] module Pointer to the AES software instance struct
391 *
392 * \retval AES_ENCRYPTION_COMPLETE AES encryption complete
393 * \retval AES_GF_MULTI_COMPLETE AES GF multiplication complete
394 */
aes_get_status(struct aes_module * const module)395 static inline uint32_t aes_get_status(struct aes_module *const module)
396 {
397 /* Sanity check arguments */
398 Assert(module);
399 Assert(module->hw);
400
401 uint32_t int_flags = module->hw->INTFLAG.reg;
402 uint32_t status_flags = 0;
403
404 if (int_flags & AES_INTFLAG_ENCCMP) {
405 status_flags |= AES_ENCRYPTION_COMPLETE;
406 }
407
408 if (int_flags & AES_INTFLAG_GFMCMP) {
409 status_flags |= AES_GF_MULTI_COMPLETE;
410 }
411
412 return status_flags;
413 }
414
415 /**
416 * \brief Clears a module status flag.
417 *
418 * Clears the given status flag of the module.
419 *
420 * \param[in] module Pointer to the AES software instance struct
421 * \param[in] status_flags Bitmask flags to clear
422 */
aes_clear_status(struct aes_module * const module,const uint32_t status_flags)423 static inline void aes_clear_status(
424 struct aes_module *const module,
425 const uint32_t status_flags)
426 {
427 /* Sanity check arguments */
428 Assert(module);
429 Assert(module->hw);
430
431 uint32_t int_flags = 0;
432
433 if (status_flags & AES_ENCRYPTION_COMPLETE) {
434 int_flags |= AES_INTENCLR_ENCCMP;
435 }
436
437 if (status_flags & AES_GF_MULTI_COMPLETE) {
438 int_flags |= AES_INTENCLR_GFMCMP;
439 }
440
441 /* Clear interrupt flag */
442 module->hw->INTFLAG.reg = int_flags;
443 }
444
445 /** @} */
446
447 /**
448 * \name Galois Counter Mode
449 * @{
450 */
451
452 /**
453 * \brief Get the AES GCM Hash Value.
454 *
455 * \param[in] module Pointer to the AES software instance struct
456 * \param[in] id Index into the GHASH array (range 0 to 3)
457 *
458 * \return The content of the GHASHRx[x = 0...3] value.
459 */
aes_gcm_read_ghash(struct aes_module * const module,uint32_t id)460 static inline uint32_t aes_gcm_read_ghash(struct aes_module *const module, uint32_t id)
461 {
462 Assert(module);
463 Assert(module->hw);
464
465 return module->hw->GHASH[id].reg;
466 }
467
468 /**
469 * \brief Set the AES GCM Hash Value.
470 *
471 * \param[in] module Pointer to the AES software instance struct
472 * \param[in] id Index into the GHASHx array (range 0 to 3)
473 * \param[in] ghash GCM hash value
474 */
aes_gcm_write_ghash(struct aes_module * const module,uint32_t id,uint32_t ghash)475 static inline void aes_gcm_write_ghash(struct aes_module *const module,
476 uint32_t id,uint32_t ghash)
477 {
478 Assert(module);
479 Assert(module->hw);
480
481 module->hw->GHASH[id].reg = ghash;
482 }
483
484
485 /**
486 * \brief Get AES GCM Hash key.
487 *
488 * \param[in] module Pointer to the AES software instance struct
489 * \param[in] id Index into the Hash key array (range 0 to 3)
490 *
491 * \return The contents of the HASHKEYx[x = 0...3] specified.
492 */
aes_gcm_read_hash_key(struct aes_module * const module,uint32_t id)493 static inline uint32_t aes_gcm_read_hash_key(struct aes_module *const module,
494 uint32_t id)
495 {
496 Assert(module);
497 Assert(module->hw);
498
499 return module->hw->HASHKEY[id].reg;
500 }
501
502 /**
503 * \brief Set the AES GCM Hash key.
504 *
505 * \param[in] module Pointer to the AES software instance struct
506 * \param[in] id Index into the Hash key array (range 0 to 3)
507 * \param[in] key GCM Hash key
508 */
aes_gcm_write_hash_key(struct aes_module * const module,uint32_t id,uint32_t key)509 static inline void aes_gcm_write_hash_key(struct aes_module *const module,
510 uint32_t id, uint32_t key)
511 {
512 Assert(module);
513 Assert(module->hw);
514
515 module->hw->HASHKEY[id].reg = key;
516 }
517
518 /**
519 * \brief Get the AES GCM cipher length.
520 *
521 * \param[in] module Pointer to the AES software instance struct
522 *
523 * \return The contents of the HASHKEYx[x = 0...3] specified.
524 */
aes_gcm_read_cipher_len(struct aes_module * const module)525 static inline uint32_t aes_gcm_read_cipher_len(struct aes_module *const module)
526 {
527 Assert(module);
528 Assert(module->hw);
529
530 return (module->hw->CIPLEN.reg);
531 }
532
533 /**
534 * \brief Set the AES GCM cipher length.
535 *
536 * \param[in] module Pointer to the AES software instance struct
537 * \param[in] len Cipher length
538 */
aes_gcm_write_cipher_len(struct aes_module * const module,uint32_t len)539 static inline void aes_gcm_write_cipher_len(struct aes_module *const module,
540 uint32_t len)
541 {
542 Assert(module);
543 Assert(module->hw);
544
545 module->hw->CIPLEN.reg = len;
546 }
547
548 /**
549 * \brief Set GCM end of input message status.
550 *
551 * \param[in] module Pointer to the AES software instance struct
552 */
aes_gcm_set_end_message_status(struct aes_module * const module)553 static inline void aes_gcm_set_end_message_status(struct aes_module *const module)
554 {
555 Assert(module);
556 Assert(module->hw);
557
558 module->hw->CTRLB.reg |= AES_CTRLB_EOM;
559 }
560
561 /**
562 * \brief Clear GCM end of input message status.
563 *
564 * \param[in] module Pointer to the AES software instance struct
565 */
aes_gcm_clear_end_message_status(struct aes_module * const module)566 static inline void aes_gcm_clear_end_message_status(struct aes_module *const module)
567 {
568 Assert(module);
569 Assert(module->hw);
570
571 module->hw->CTRLB.reg &= ~AES_CTRLB_EOM;
572 }
573
574 /**
575 * \brief Set GF multiplication of GCM mode.
576 *
577 * \param[in] module Pointer to the AES software instance struct
578 */
aes_gcm_set_gf_multiplication(struct aes_module * const module)579 static inline void aes_gcm_set_gf_multiplication(struct aes_module *const module)
580 {
581 Assert(module);
582 Assert(module->hw);
583
584 module->hw->CTRLB.reg |= AES_CTRLB_GFMUL;
585 }
586
587 /** @} */
588
589 #ifdef __cplusplus
590 }
591 #endif
592
593 /** @} */
594
595 /**
596 * \page asfdoc_sam0_drivers_aes_extra Extra Information for Advanced Encryption Standard
597 *
598 * \section asfdoc_sam0_drivers_aes_extra_acronyms Acronyms
599 * Below is a table listing the acronyms used in this module, along with their
600 * intended meanings.
601 *
602 * <table>
603 * <tr>
604 * <th>Acronym</th>
605 * <th>Definition</th>
606 * </tr>
607 * <tr>
608 * <td>AAD</td>
609 * <td>Additional Authenticated Data</td>
610 * </tr>
611 * <tr>
612 * <td>CBC</td>
613 * <td>Cipher Block Chaining</td>
614 * </tr>
615 * <tr>
616 * <td>CFB</td>
617 * <td>Cipher Feedback</td>
618 * </tr>
619 * <tr>
620 * <td>CTR</td>
621 * <td> Counter</td>
622 * </tr>
623 * <tr>
624 * <td>DMA</td>
625 * <td>Direct Memory Access</td>
626 * </tr>
627 * <tr>
628 * <td>DMAC</td>
629 * <td>DMA Controller</td>
630 * </tr>
631 * <tr>
632 * <td>ECB</td>
633 * <td>Electronic Codebook</td>
634 * </tr>
635 * <tr>
636 * <td>GCM</td>
637 * <td>Galois Counter Mode</td>
638 * </tr>
639 * <tr>
640 * <td>OFB</td>
641 * <td>Output Feedback</td>
642 * </tr>
643 * <tr>
644 * <td>QSG</td>
645 * <td>Quick Start Guide</td>
646 * </tr>
647 * </table>
648 *
649 *
650 * \section asfdoc_sam0_drivers_aes_extra_dependencies Dependencies
651 * This driver has the following dependencies:
652 *
653 * - None
654 *
655 *
656 * \section asfdoc_sam0_drivers_aes_extra_errata Errata
657 * There are no errata related to this driver.
658 *
659 *
660 * \section asfdoc_sam0_drivers_aes_extra_history Module History
661 * An overview of the module history is presented in the table below, with
662 * details on the enhancements and fixes made to the module since its first
663 * release. The current version of this corresponds to the newest version in
664 * the table.
665 *
666 * <table>
667 * <tr>
668 * <th>Changelog</th>
669 * </tr>
670 * <tr>
671 * <td>Initial release</td>
672 * </tr>
673 * </table>
674 */
675
676 /**
677 * \page asfdoc_sam0_drivers_aes_exqsg Examples for Advanced Encryption Standard
678 *
679 * This is a list of the available Quick Start Guides (QSGs) and example
680 * applications for \ref asfdoc_sam0_drivers_aes_group. QSGs are simple examples with
681 * step-by-step instructions to configure and use this driver in a selection of
682 * use cases. Note that a QSG can be compiled as a standalone application or be
683 * added to the user application.
684 *
685 * - \subpage asfdoc_sam0_aes_basic_use_case
686 * - \subpage asfdoc_sam0_aes_callback_use_case
687 * - \subpage asfdoc_sam0_aes_dma_use_case
688 *
689 * \page asfdoc_sam0_drivers_aes_document_revision_history Document Revision History
690 *
691 * <table>
692 * <tr>
693 * <th>Doc. Rev.</td>
694 * <th>Date</td>
695 * <th>Comments</td>
696 * </tr>
697 * <tr>
698 * <td>42445B</td>
699 * <td>12/2015</td>
700 * <td>Added support for SAM L22</td>
701 * </tr>
702 * <tr>
703 * <td>42445A</td>
704 * <td>06/2015</td>
705 * <td>Initial release</td>
706 * </tr>
707 * </table>
708 *
709 */
710
711 #ifdef __cplusplus
712 }
713 #endif
714
715 #endif /* AES_H_INCLUDED */
716