1 /**
2  * \file
3  *
4  * \brief I2C Slave Interrupt Driver for SAMB
5  *
6  * Copyright (C) 2015-2016 Atmel Corporation. All rights reserved.
7  *
8  * \asf_license_start
9  *
10  * \page License
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions are met:
14  *
15  * 1. Redistributions of source code must retain the above copyright notice,
16  *    this list of conditions and the following disclaimer.
17  *
18  * 2. Redistributions in binary form must reproduce the above copyright notice,
19  *    this list of conditions and the following disclaimer in the documentation
20  *    and/or other materials provided with the distribution.
21  *
22  * 3. The name of Atmel may not be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * 4. This software may only be redistributed and used in connection with an
26  *    Atmel microcontroller product.
27  *
28  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  *
40  * \asf_license_stop
41  *
42  */
43 /*
44  * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45  */
46 
47 #include "i2c_slave.h"
48 #if I2C_SLAVE_CALLBACK_MODE == true
49 #include "i2c_slave_interrupt.h"
50 #endif
51 
52 /**
53  * \brief Gets the I<SUP>2</SUP>C master default configurations
54  *
55  * Use to initialize the configuration structure to known default values.
56  *
57  * The default configuration is as follows:
58  * - I2C core I2C_CORE1
59  * - Clock sourc I2C_CLK_INPUT_3
60  * - Clock divider = 0x10
61  * - Pinmux pad0 PINMUX_LP_GPIO_8_MUX2_I2C0_SDA
62  * - Pinmux pad1 PINMUX_LP_GPIO_9_MUX2_I2C0_SCK
63  *
64  * \param[out] config  Pointer to configuration structure to be initiated
65  */
i2c_slave_get_config_defaults(struct i2c_slave_config * const config)66 void i2c_slave_get_config_defaults(
67 		struct i2c_slave_config *const config)
68 {
69 	/* Sanity check */
70 	Assert(config);
71 
72 	config->clock_source    = I2C_CLK_INPUT_3;
73 	config->clock_divider   = 0x10;
74 	config->pin_number_pad0 = PIN_LP_GPIO_8;
75 	config->pin_number_pad1 = PIN_LP_GPIO_9;
76 	config->pinmux_sel_pad0 = ((PIN_LP_GPIO_8 << 16) | MUX_LP_GPIO_8_I2C0_SDA);
77 	config->pinmux_sel_pad1 = ((PIN_LP_GPIO_9 << 16) | MUX_LP_GPIO_9_I2C0_SCL);
78 }
79 
80 /**
81  * \internal Sets configurations to module
82  *
83  * \param[out] module  Pointer to software module structure
84  * \param[in]  config  Configuration structure with configurations to set
85  *
86  * \return Status of setting configuration.
87  * \retval STATUS_OK                        If module was configured correctly
88  * \retval STATUS_ERR_ALREADY_INITIALIZED   If setting other GCLK generator than
89  *                                          previously set
90  * \retval STATUS_ERR_BAUDRATE_UNAVAILABLE  If given baud rate is not compatible
91  *                                          with set GCLK frequency
92  */
_i2c_slave_set_config(struct i2c_slave_module * const module,const struct i2c_slave_config * const config)93 static enum status_code _i2c_slave_set_config(
94 		struct i2c_slave_module *const module,
95 		const struct i2c_slave_config *const config)
96 {
97 	/* Sanity check */
98 	Assert(module);
99 	Assert(module->hw);
100 	Assert(config);
101 
102 	enum status_code status = STATUS_OK;
103 	I2c *const i2c_module = (module->hw);
104 
105 	/* Set the pinmux for this i2c module. */
106 	gpio_pinmux_cofiguration(config->pin_number_pad0, (uint16_t)(config->pinmux_sel_pad0));
107 	gpio_pinmux_cofiguration(config->pin_number_pad1, (uint16_t)(config->pinmux_sel_pad1));
108 
109 	/* Find and set baudrate. */
110 	i2c_module->CLOCK_SOURCE_SELECT.reg = config->clock_source;
111 	i2c_module->I2C_CLK_DIVIDER.reg = I2C_CLK_DIVIDER_I2C_DIVIDE_RATIO(config->clock_divider);
112 	/* I2C slave address */
113 	i2c_module->I2C_SLAVE_ADDRESS.reg = I2C_SLAVE_ADDRESS_ADDRESS(config->address);
114 	/* I2C slave mode */
115 	i2c_module->I2C_MASTER_MODE.reg = I2C_MASTER_MODE_MASTER_ENABLE_0;
116 	return status;
117 }
118 
119 /**
120  * \brief Initializes the requested I<SUP>2</SUP>C hardware module
121  *
122  * Initializes the I<SUP>2</SUP>C slave device requested and sets the provided
123  * software module struct. Run this function before any further use of
124  * the driver.
125  *
126  * \param[out] module  Pointer to software module struct
127  * \param[in]  config  Pointer to the configuration struct
128  *
129  * \return Status of initialization.
130  * \retval STATUS_OK                        Module initiated correctly
131  * \retval STATUS_ERR_INVALID_ARG           Invalid argument in module or config structure.
132  * \retval STATUS_ERR_ALREADY_INITIALIZED   If the Pinmux is not a valid one for I2C signals.
133  *
134  */
i2c_slave_init(struct i2c_slave_module * const module,I2c * const hw,const struct i2c_slave_config * const config)135 enum status_code i2c_slave_init(
136 		struct i2c_slave_module *const module,
137 		I2c *const hw,
138 		const struct i2c_slave_config *const config)
139 {
140 	/* Sanity check */
141 	Assert(module);
142 	Assert(module->hw);
143 	Assert(config);
144 
145 	module->hw = hw;
146 
147 	/* Sanity check arguments. */
148 	if ((module == NULL) || (config == NULL))
149 		return STATUS_ERR_INVALID_ARG;
150 
151 	i2c_disable(module->hw);
152 
153 	if (module->hw == I2C0)
154 		system_peripheral_reset(PERIPHERAL_I2C0_CORE);
155 	else if (module->hw == I2C1) {
156 		system_peripheral_reset(PERIPHERAL_I2C1_CORE);
157 	} else {
158 		return STATUS_ERR_INVALID_ARG;
159 	}
160 
161 #if I2C_SLAVE_CALLBACK_MODE == true
162 	/* Initialize values in module. */
163 	module->registered_callback = 0;
164 	module->enabled_callback    = 0;
165 	module->buffer_length       = 0;
166 	module->buffer_remaining    = 0;
167 	module->buffer              = NULL;
168 	module->status              = STATUS_OK;
169 
170 	_i2c_instances = (void*)module;
171 	if (module->hw == I2C0) {
172 		system_register_isr(RAM_ISR_TABLE_I2CRX0_INDEX, (uint32_t)_i2c_slave_rx_isr_handler);
173 		system_register_isr(RAM_ISR_TABLE_I2CTX0_INDEX, (uint32_t)_i2c_slave_tx_isr_handler);
174 		NVIC_EnableIRQ(I2C0_RX_IRQn);
175 		NVIC_EnableIRQ(I2C0_TX_IRQn);
176 	} else if (module->hw == I2C1) {
177 		system_register_isr(RAM_ISR_TABLE_I2CRX1_INDEX, (uint32_t)_i2c_slave_rx_isr_handler);
178 		system_register_isr(RAM_ISR_TABLE_I2CTX1_INDEX, (uint32_t)_i2c_slave_tx_isr_handler);
179 		NVIC_EnableIRQ(I2C1_RX_IRQn);
180 		NVIC_EnableIRQ(I2C1_TX_IRQn);
181 	}
182 #endif
183 
184 	/* Set config and return status. */
185 	if(_i2c_slave_set_config(module, config) != STATUS_OK)
186 		return STATUS_ERR_NOT_INITIALIZED;
187 
188 	return STATUS_OK;
189 }
190 
191 /**
192  * \brief Reads a packet from the master
193  *
194  * Reads a packet from the master. This will wait for the master to issue a
195  * request.
196  *
197  * \param[in]  module  Pointer to software module structure
198  * \param[out] packet  Packet to read from master
199  *
200  * \return Status of packet read.
201  * \retval STATUS_OK                Packet was read successfully
202  * \retval STATUS_ERR_INVALID_ARG   Invalid argument(s) was provided
203  */
i2c_slave_read_packet_wait(struct i2c_slave_module * const module,struct i2c_slave_packet * const packet)204 enum status_code i2c_slave_read_packet_wait(
205 		struct i2c_slave_module *const module,
206 		struct i2c_slave_packet *const packet)
207 {
208 	/* Sanity check */
209 	Assert(module);
210 	Assert(module->hw);
211 	Assert(packet);
212 
213 	I2c *const i2c_module = (module->hw);
214 	uint16_t counter = 0;
215 	uint32_t status  = 0;
216 	uint16_t length  = packet->data_length;
217 
218 	if (length == 0) {
219 		return STATUS_ERR_INVALID_ARG;
220 	}
221 
222 	do {
223 		status = i2c_module->RECEIVE_STATUS.reg;
224 		if (status & I2C_RECEIVE_STATUS_RX_FIFO_NOT_EMPTY)
225 			packet->data[counter++] = i2c_module->RECEIVE_DATA.reg;
226 	} while (counter < length);
227 
228 	/* Now check whether the core has sent the data out and free the bus. */
229 	while (!(status & I2C_TRANSMIT_STATUS_TX_FIFO_EMPTY)) {
230 		status = i2c_module->TRANSMIT_STATUS.reg;
231 	}
232 
233 	return STATUS_OK;
234 }
235 
236 /**
237  * \brief Writes a packet to the master
238  *
239  * Writes a packet to the master. This will wait for the master to issue
240  * a request.
241  *
242  * \param[in]  module  Pointer to software module structure
243  * \param[in]  packet  Packet to write to master
244  *
245  * \return Status of packet write.
246  * \retval STATUS_OK                Packet was written successfully
247  * \retval STATUS_ERR_INVALID_ARG   Invalid argument(s) was provided
248  */
i2c_slave_write_packet_wait(struct i2c_slave_module * const module,struct i2c_slave_packet * const packet)249 enum status_code i2c_slave_write_packet_wait(
250 		struct i2c_slave_module *const module,
251 		struct i2c_slave_packet *const packet)
252 {
253 	I2c *const i2c_module = (module->hw);
254 	uint16_t i = 0;
255 	uint32_t status = 0;
256 	uint16_t length = packet->data_length;
257 
258 	if (length == 0) {
259 		return STATUS_ERR_INVALID_ARG;
260 	}
261 
262 	i2c_wait_for_idle(i2c_module);
263 
264 	/* Flush the FIFO */
265 	i2c_module->I2C_FLUSH.reg = 1;
266 
267 	do {
268 		status = i2c_module->TRANSMIT_STATUS.reg;
269 		if (status & I2C_TRANSMIT_STATUS_TX_FIFO_NOT_FULL_Msk) {
270 			i2c_module->TRANSMIT_DATA.reg = packet->data[i++];
271 		}
272 	} while (i < length);
273 
274 	/* Now check whether the core has sent the data out and its good to free the bus */
275 	while (!(status & I2C_TRANSMIT_STATUS_TX_FIFO_EMPTY)) {
276 		status = i2c_module->TRANSMIT_STATUS.reg;
277 	}
278 
279 	return STATUS_OK;
280 }