1 /**
2 * \file
3 *
4 * \brief SAM RTC Driver (Count Mode)
5 *
6 * Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43 /*
44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45 */
46
47 #ifndef RTC_COUNT_H_INCLUDED
48 #define RTC_COUNT_H_INCLUDED
49
50 /**
51 * \defgroup asfdoc_sam0_rtc_count_group SAM RTC Count (RTC COUNT) Driver
52 *
53 * This driver for Atmel® | SMART ARM®-based microcontrollers provides
54 * an interface for the configuration and management of the device's Real Time
55 * Clock functionality in Count operating mode, for the configuration and
56 * retrieval of the current RTC counter value. The following driver API modes
57 * are covered by this manual:
58 *
59 * - Polled APIs
60 * \if RTC_COUNT_CALLBACK_MODE
61 * - Callback APIs
62 * \endif
63 *
64 * The following peripheral is used by this module:
65 * - RTC (Real Time Clock)
66 *
67 * The following devices can use this module:
68 * - Atmel | SMART SAM D20/D21
69 * - Atmel | SMART SAM R21
70 * - Atmel | SMART SAM D09/D10/D11
71 * - Atmel | SMART SAM L21/L22
72 * - Atmel | SMART SAM DA1
73 * - Atmel | SMART SAM C20/C21
74 * - Atmel | SMART SAM HA1
75 * - Atmel | SMART SAM R30
76 *
77 * The outline of this documentation is as follows:
78 * - \ref asfdoc_sam0_rtc_count_prerequisites
79 * - \ref asfdoc_sam0_rtc_count_module_overview
80 * - \ref asfdoc_sam0_rtc_count_special_considerations
81 * - \ref asfdoc_sam0_rtc_count_extra_info
82 * - \ref asfdoc_sam0_rtc_count_examples
83 * - \ref asfdoc_sam0_rtc_count_api_overview
84 *
85 *
86 * \section asfdoc_sam0_rtc_count_prerequisites Prerequisites
87 *
88 * There are no prerequisites for this module.
89 *
90 *
91 * \section asfdoc_sam0_rtc_count_module_overview Module Overview
92 *
93 * The RTC module in the SAM devices is a 32-bit counter, with a 10-bit
94 * programmable prescaler. Typically, the RTC clock is run continuously,
95 * including in the device's low-power sleep modes, to track the current time
96 * and date information. The RTC can be used as a source to wake up the system
97 * at a scheduled time or periodically using the alarm functions.
98 *
99 * In this driver, the RTC is operated in Count mode. This allows for an
100 * easy integration of an asynchronous counter into a user application, which is
101 * capable of operating while the device is in sleep mode.
102 *
103 * Whilst operating in Count mode, the RTC features:
104 * - 16-bit counter mode
105 * - Selectable counter period
106 * - Up to six configurable compare values
107 * - 32-bit counter mode
108 * - Clear counter value on match
109 * - Up to four configurable compare values
110 *
111 * \subsection asfdoc_sam0_rtc_count_features Driver Feature Macro Definition
112 * <table>
113 * <tr>
114 * <th>Driver Feature Macro</th>
115 * <th>Supported devices</th>
116 * </tr>
117 * <tr>
118 * <td>FEATURE_RTC_PERIODIC_INT</td>
119 * <td>SAM L21/L22/C20/C21/R30</td>
120 * </tr>
121 * <tr>
122 * <td>FEATURE_RTC_PRESCALER_OFF</td>
123 * <td>SAM L21/L22/C20/C21/R30</td>
124 * </tr>
125 * <tr>
126 * <td>FEATURE_RTC_CLOCK_SELECTION</td>
127 * <td>SAM L21/L22/C20/C21/R30</td>
128 * </tr>
129 * <tr>
130 * <td>FEATURE_RTC_GENERAL_PURPOSE_REG</td>
131 * <td>SAM L21/L22/R30</td>
132 * </tr>
133 * <tr>
134 * <td>FEATURE_RTC_CONTINUOUSLY_UPDATED</td>
135 * <td>SAM D20, SAM D21, SAM R21, SAM D10, SAM D11, SAM DA1, SAM HA1</td>
136 * </tr>
137 * <tr>
138 * <td>FEATURE_RTC_TAMPER_DETECTION</td>
139 * <td>SAM L22</td>
140 * </tr>
141 * </table>
142 * \note The specific features are only available in the driver when the
143 * selected device supports those features.
144 *
145 * \section asfdoc_sam0_rtc_count_module_overview_compares Compare and Overflow
146 * The RTC can be used with up to 4/6 compare values (depending on selected
147 * operation mode). These compare values will trigger on match with the current
148 * RTC counter value, and can be set up to trigger an interrupt, event, or both.
149 * The RTC can also be configured to clear the counter value on compare match
150 * in 32-bit mode, resetting the count value back to zero.
151 *
152 * If the RTC is operated without the Clear on Match option enabled, or in
153 * 16-bit mode, the RTC counter value will instead be cleared on overflow once
154 * the maximum count value has been reached:
155 *
156 * \f[ COUNT_{MAX} = 2^{32}-1 \f] for 32-bit counter mode, and
157 * \f[ COUNT_{MAX} = 2^{16}-1 \f] for 16-bit counter mode.
158 *
159 * When running in 16-bit mode, the overflow value is selectable with a period
160 * value. The counter overflow will then occur when the counter value reaches
161 * the specified period value.
162 *
163 * \subsection asfdoc_sam0_rtc_count_module_overview_periodic Periodic Events
164 * The RTC can generate events at periodic intervals, allowing for direct
165 * peripheral actions without CPU intervention. The periodic events can be
166 * generated on the upper eight bits of the RTC prescaler, and will be generated on
167 * the rising edge transition of the specified bit. The resulting periodic
168 * frequency can be calculated by the following formula:
169 *
170 * \f[ f_{PERIODIC}=\frac{f_{ASY}}{2^{n+3}} \f]
171 *
172 * Where \f$f_{ASY}\f$ refers to the \e asynchronous clock is set up in the RTC
173 * module configuration. The \b n parameter is the event source generator index
174 * of the RTC module. If the asynchronous clock is operated at the recommended
175 * frequency of 1KHz, the formula results in the values shown in
176 * \ref asfdoc_sam0_rtc_count_module_rtc_hz "the table below".
177 *
178 * \anchor asfdoc_sam0_rtc_count_module_rtc_hz
179 * <table>
180 * <caption>RTC Event Frequencies for Each Prescaler Bit Using a 1KHz Clock</caption>
181 * <tr>
182 * <th>n</th> <th>Periodic event</th>
183 * </tr>
184 * <tr>
185 * <td>7</td> <td>1Hz</td>
186 * </tr>
187 * <tr>
188 * <td>6</td> <td>2Hz</td>
189 * </tr>
190 * <tr>
191 * <td>5</td> <td>4Hz</td>
192 * </tr>
193 * <tr>
194 * <td>4</td> <td>8Hz</td>
195 * </tr>
196 * <tr>
197 * <td>3</td> <td>16Hz</td>
198 * </tr>
199 * <tr>
200 * <td>2</td> <td>32Hz</td>
201 * </tr>
202 * <tr>
203 * <td>1</td> <td>64Hz</td>
204 * </tr>
205 * <tr>
206 * <td>0</td> <td>128Hz</td>
207 * </tr>
208 * </table>
209 *
210 * \note The connection of events between modules requires the use of the
211 * \ref asfdoc_sam0_events_group "SAM Event System (EVENTS) Driver"
212 * to route output event of one module to the the input event of another.
213 * For more information on event routing, refer to the event driver
214 * documentation.
215 *
216 * \subsection asfdoc_sam0_rtc_count_module_overview_correction Digital Frequency Correction
217 * The RTC module contains Digital Frequency Correction logic to compensate for
218 * inaccurate source clock frequencies which would otherwise result in skewed
219 * time measurements. The correction scheme requires that at least two bits
220 * in the RTC module prescaler are reserved by the correction logic. As a
221 * result of this implementation, frequency correction is only available when
222 * the RTC is running from a 1Hz reference clock.
223 *
224 * The correction procedure is implemented by subtracting or adding a single
225 * cycle from the RTC prescaler every 1024 RTC GCLK cycles. The adjustment is
226 * applied the specified number of time (maximum 127) over 976 of these periods. The
227 * corresponding correction in PPM will be given by:
228 *
229 * \f[ Correction(PPM) = \frac{VALUE}{999424}10^6 \f]
230 *
231 * The RTC clock will tick faster if provided with a positive correction value,
232 * and slower when given a negative correction value.
233 *
234 *
235 * \subsection asfdoc_sam0_rtc_count_module_overview_tamper_detect RTC Tamper Detect
236 * see \ref asfdoc_sam0_rtc_tamper_detect
237 *
238 * \section asfdoc_sam0_rtc_count_special_considerations Special Considerations
239 *
240 * \subsection asfdoc_sam0_rtc_count_special_considerations_clock Clock Setup
241 * \subsubsection asfdoc_sam0_rtc_count_clock_samd_r SAM D20/D21/R21/D10/D11/DA1/HA1 Clock Setup
242 * The RTC is typically clocked by a specialized GCLK generator that has a
243 * smaller prescaler than the others. By default the RTC clock is on, selected
244 * to use the internal 32KHz RC-oscillator with a prescaler of 32, giving a
245 * resulting clock frequency of 1KHz to the RTC. When the internal RTC
246 * prescaler is set to 1024, this yields an end-frequency of 1Hz.
247 *
248 * The implementer also has the option to set other end-frequencies.
249 * \ref asfdoc_sam0_rtc_count_rtc_out_freq "The table below" lists the
250 * available RTC frequencies for each possible GCLK and RTC input prescaler
251 * options.
252 *
253 * \anchor asfdoc_sam0_rtc_count_rtc_out_freq
254 * <table>
255 * <caption>RTC Output Frequencies from Allowable Input Clocks</caption>
256 * <tr>
257 * <th>End-frequency</th>
258 * <th>GCLK prescaler</th>
259 * <th>RTC prescaler</th>
260 * </tr>
261 * <tr>
262 * <td>32KHz</td>
263 * <td>1</td>
264 * <td>1</td>
265 * </tr>
266 * <tr>
267 * <td>1KHz</td>
268 * <td>32</td>
269 * <td>1</td>
270 * </tr>
271 * <tr>
272 * <td>1Hz</td>
273 * <td>32</td>
274 * <td>1024</td>
275 * </tr>
276 * </table>
277 *
278 * The overall RTC module clocking scheme is shown in
279 * \ref asfdoc_sam0_rtc_count_rtc_clock_fig "the figure below".
280 *
281 * \anchor asfdoc_sam0_rtc_count_rtc_clock_fig
282 * \dot
283 * digraph clocking_scheme {
284 * rankdir=LR;
285 * GCLK [shape="record", label="<f0> GCLK | <f1> RTC_GCLK",
286 * bgcolor="lightgray", style="filled"];
287 * RTCPRE [shape="record" label="<f0> RTC | <f1> RTC PRESCALER"];
288 * RTC [shape="record", label="<f0> RTC | <f1> RTC CLOCK"];
289 *
290 * GCLK:f1 -> RTCPRE:f1;
291 * RTCPRE:f1 -> RTC:f1;
292 * }
293 * \enddot
294 *
295 * \subsubsection asfdoc_sam0_rtc_count_clock_saml SAM L21/C20/C21/R30 Clock Setup
296 * The RTC clock can be selected from OSC32K, XOSC32K, or OSCULP32K, and a 32KHz
297 * or 1KHz oscillator clock frequency is required. This clock must be
298 * configured and enabled in the 32KHz oscillator controller before using the RTC.
299 *
300 * The table below lists the available RTC clock \ref asfdoc_sam0_rtc_count_rtc_clk.
301 *
302 * \anchor asfdoc_sam0_rtc_count_rtc_clk
303 * <table>
304 * <caption>RTC Clocks Source</caption>
305 * <tr>
306 * <th>RTC clock frequency</th>
307 * <th>Clock source</th>
308 * <th>Description</th>
309 * </tr>
310 * <tr>
311 * <td>1.024KHz</td>
312 * <td>ULP1K</td>
313 * <td>1.024KHz from 32KHz internal ULP oscillator</td>
314 * </tr>
315 * <tr>
316 * <td>32.768KHz</td>
317 * <td>ULP32K</td>
318 * <td>32.768KHz from 32KHz internal ULP oscillator</td>
319 * </tr>
320 * <tr>
321 * <td>1.024KHz</td>
322 * <td>OSC1K</td>
323 * <td>1.024KHz from 32KHz internal oscillator</td>
324 * </tr>
325 * <tr>
326 * <td>32.768KHz</td>
327 * <td>OSC32K</td>
328 * <td>32.768KHz from 32KHz internal oscillator</td>
329 * </tr>
330 * <tr>
331 * <td>1.024KHz</td>
332 * <td>XOSC1K</td>
333 * <td>1.024KHz from 32KHz internal oscillator</td>
334 * </tr>
335 * <tr>
336 * <td>32.768KHz</td>
337 * <td>XOSC32K</td>
338 * <td>32.768KHz from 32KHz external crystal oscillator</td>
339 * </tr>
340 * </table>
341 *
342 * \section asfdoc_sam0_rtc_count_extra_info Extra Information
343 *
344 * For extra information, see \ref asfdoc_sam0_rtc_count_extra. This includes:
345 * - \ref asfdoc_sam0_rtc_count_extra_acronyms
346 * - \ref asfdoc_sam0_rtc_count_extra_dependencies
347 * - \ref asfdoc_sam0_rtc_count_extra_errata
348 * - \ref asfdoc_sam0_rtc_count_extra_history
349 *
350 *
351 * \section asfdoc_sam0_rtc_count_examples Examples
352 *
353 * For a list of examples related to this driver, see
354 * \ref asfdoc_sam0_rtc_count_exqsg.
355 *
356 *
357 * \section asfdoc_sam0_rtc_count_api_overview API Overview
358 * @{
359 */
360
361 #include <compiler.h>
362 #include <conf_clocks.h>
363
364 #if RTC_COUNT_ASYNC == true
365 # include <system_interrupt.h>
366 #endif
367
368 #ifdef __cplusplus
369 extern "C" {
370 #endif
371
372 /**
373 * \name Driver Feature Definition
374 *
375 * Define port features set according to different device family.
376 * @{
377 */
378 #if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30) || defined(__DOXYGEN__)
379 /** RTC periodic interval interrupt. */
380 # define FEATURE_RTC_PERIODIC_INT
381 /** RTC prescaler is off. */
382 # define FEATURE_RTC_PRESCALER_OFF
383 /** RTC clock selection. */
384 # define FEATURE_RTC_CLOCK_SELECTION
385 # if !(SAMC20) && !(SAMC21)
386 /** General purpose registers. */
387 # define FEATURE_RTC_GENERAL_PURPOSE_REG
388 # endif
389 #else
390 /** RTC continuously updated. */
391 # define FEATURE_RTC_CONTINUOUSLY_UPDATED
392 #endif
393
394 #if (SAML22) || defined(__DOXYGEN__)
395 /** RTC tamper detection. */
396 # define FEATURE_RTC_TAMPER_DETECTION
397 #endif
398
399 /*@}*/
400
401 #ifdef FEATURE_RTC_CLOCK_SELECTION
402 /**
403 * \brief Available clock source for RTC.
404 * RTC clock source.
405 */
406 enum rtc_clock_sel {
407 /** 1.024KHz from 32KHz internal ULP oscillator */
408 RTC_CLOCK_SELECTION_ULP1K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val,
409 /** 32.768KHz from 32KHz internal ULP oscillator */
410 RTC_CLOCK_SELECTION_ULP32K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val,
411 #if !(SAML22)
412 /** 1.024KHz from 32KHz internal oscillator */
413 RTC_CLOCK_SELECTION_OSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC1K_Val,
414 /** 32.768KHz from 32KHz internal oscillator */
415 RTC_CLOCK_SELECTION_OSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC32K_Val,
416 #endif
417 /** 1.024KHz from 32KHz external oscillator */
418 RTC_CLOCK_SELECTION_XOSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val,
419 /** 32.768KHz from 32.768KHz external crystal oscillator */
420 RTC_CLOCK_SELECTION_XOSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val,
421 };
422 #endif
423
424 /**
425 * \brief Available operation modes for the RTC.
426 *
427 * RTC Count operating modes, to select the counting width and associated module
428 * operation.
429 */
430 enum rtc_count_mode {
431 /** RTC Count module operates in 16-bit mode */
432 RTC_COUNT_MODE_16BIT = 0,
433 /** RTC Count module operates in 32-bit mode */
434 RTC_COUNT_MODE_32BIT = 1,
435 };
436
437 #if !defined (RTC_NUM_OF_COMP16) && defined(RTC_COMP16_NUM)
438 #define RTC_NUM_OF_COMP16 RTC_COMP16_NUM
439 #endif
440
441 /**
442 * \brief Available compare channels.
443 *
444 * \note Not all compare channels are available in all devices and modes.
445 */
446 enum rtc_count_compare {
447 /** Compare channel 0 */
448 RTC_COUNT_COMPARE_0 = 0,
449 #if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__)
450 /** Compare channel 1 */
451 RTC_COUNT_COMPARE_1 = 1,
452 #endif
453 #if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__)
454 /** Compare channel 2 */
455 RTC_COUNT_COMPARE_2 = 2,
456 #endif
457 #if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__)
458 /** Compare channel 3 */
459 RTC_COUNT_COMPARE_3 = 3,
460 #endif
461 #if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__)
462 /** Compare channel 4 */
463 RTC_COUNT_COMPARE_4 = 4,
464 #endif
465 #if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__)
466 /** Compare channel 5 */
467 RTC_COUNT_COMPARE_5 = 5,
468 #endif
469 };
470
471 #ifdef FEATURE_RTC_PERIODIC_INT
472 /**
473 * \brief Available periodic interval source.
474 */
475 enum rtc_count_periodic_interval{
476 /** Periodic interval 0 */
477 RTC_COUNT_PERIODIC_INTERVAL_0 = 0,
478 /** Periodic interval 1 */
479 RTC_COUNT_PERIODIC_INTERVAL_1 = 1,
480 /** Periodic interval 2 */
481 RTC_COUNT_PERIODIC_INTERVAL_2 = 2,
482 /** Periodic interval 3 */
483 RTC_COUNT_PERIODIC_INTERVAL_3 = 3,
484 /** Periodic interval 4 */
485 RTC_COUNT_PERIODIC_INTERVAL_4 = 4,
486 /** Periodic interval 5 */
487 RTC_COUNT_PERIODIC_INTERVAL_5 = 5,
488 /** Periodic interval 6 */
489 RTC_COUNT_PERIODIC_INTERVAL_6 = 6,
490 /** Periodic interval 7 */
491 RTC_COUNT_PERIODIC_INTERVAL_7 = 7,
492 };
493 #endif
494
495 #if RTC_COUNT_ASYNC == true
496 #ifdef FEATURE_RTC_PERIODIC_INT
497 /**
498 * \brief Callback types.
499 *
500 * The available callback types for the RTC count module.
501 */
502 enum rtc_count_callback {
503 /** Callback for Periodic Interval 0 Interrupt */
504 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_0 = 0,
505 /** Callback for Periodic Interval 1 Interrupt */
506 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_1,
507 /** Callback for Periodic Interval 2 Interrupt */
508 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_2,
509 /** Callback for Periodic Interval 3 Interrupt */
510 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_3,
511 /** Callback for Periodic Interval 4 Interrupt */
512 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_4,
513 /** Callback for Periodic Interval 5 Interrupt */
514 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_5,
515 /** Callback for Periodic Interval 6 Interrupt */
516 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_6,
517 /** Callback for Periodic Interval 7 Interrupt */
518 RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_7,
519 /** Callback for compare channel 0 */
520 RTC_COUNT_CALLBACK_COMPARE_0,
521 # if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__)
522 /** Callback for compare channel 1 */
523 RTC_COUNT_CALLBACK_COMPARE_1,
524 # endif
525 # if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__)
526 /** Callback for compare channel 2 */
527 RTC_COUNT_CALLBACK_COMPARE_2,
528 # endif
529 # if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__)
530 /** Callback for compare channel 3 */
531 RTC_COUNT_CALLBACK_COMPARE_3,
532 # endif
533 # if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__)
534 /** Callback for compare channel 4 */
535 RTC_COUNT_CALLBACK_COMPARE_4,
536 # endif
537 # if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__)
538 /** Callback for compare channel 5 */
539 RTC_COUNT_CALLBACK_COMPARE_5,
540 # endif
541
542 #ifdef FEATURE_RTC_TAMPER_DETECTION
543 /** Callback for tamper */
544 RTC_COUNT_CALLBACK_TAMPER,
545 #endif
546
547 /** Callback for overflow */
548 RTC_COUNT_CALLBACK_OVERFLOW,
549 # if !defined(__DOXYGEN__)
550 /** Total number of callbacks */
551 _RTC_COUNT_CALLBACK_N
552 # endif
553 };
554 #else
555 /**
556 * \brief Callback types.
557 *
558 * The available callback types for the RTC count module.
559 */
560 enum rtc_count_callback {
561 /** Callback for compare channel 0 */
562 RTC_COUNT_CALLBACK_COMPARE_0 = 0,
563 # if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__)
564 /** Callback for compare channel 1 */
565 RTC_COUNT_CALLBACK_COMPARE_1,
566 # endif
567 # if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__)
568 /** Callback for compare channel 2 */
569 RTC_COUNT_CALLBACK_COMPARE_2,
570 # endif
571 # if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__)
572 /** Callback for compare channel 3 */
573 RTC_COUNT_CALLBACK_COMPARE_3,
574 # endif
575 # if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__)
576 /** Callback for compare channel 4 */
577 RTC_COUNT_CALLBACK_COMPARE_4,
578 # endif
579 # if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__)
580 /** Callback for compare channel 5 */
581 RTC_COUNT_CALLBACK_COMPARE_5,
582 # endif
583
584 #ifdef FEATURE_RTC_TAMPER_DETECTION
585 /** Callback for tamper */
586 RTC_COUNT_CALLBACK_TAMPER,
587 #endif
588
589 /** Callback for overflow */
590 RTC_COUNT_CALLBACK_OVERFLOW,
591 # if !defined(__DOXYGEN__)
592 /** Total number of callbacks */
593 _RTC_COUNT_CALLBACK_N
594 # endif
595 };
596 #endif
597
598 # if !defined(__DOXYGEN__)
599 typedef void (*rtc_count_callback_t)(void);
600 # endif
601 #endif
602
603 #ifdef FEATURE_RTC_PRESCALER_OFF
604 /**
605 * \brief RTC input clock prescaler settings.
606 *
607 * The available input clock prescaler values for the RTC count module.
608 */
609 enum rtc_count_prescaler {
610 /** RTC prescaler is off, and the input clock frequency is
611 prescaled by a factor of 1 */
612 RTC_COUNT_PRESCALER_OFF = RTC_MODE0_CTRLA_PRESCALER_OFF,
613 /** RTC input clock frequency is prescaled by a factor of 1 */
614 RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRLA_PRESCALER_DIV1,
615 /** RTC input clock frequency is prescaled by a factor of 2 */
616 RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRLA_PRESCALER_DIV2,
617 /** RTC input clock frequency is prescaled by a factor of 4 */
618 RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRLA_PRESCALER_DIV4,
619 /** RTC input clock frequency is prescaled by a factor of 8 */
620 RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRLA_PRESCALER_DIV8,
621 /** RTC input clock frequency is prescaled by a factor of 16 */
622 RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRLA_PRESCALER_DIV16,
623 /** RTC input clock frequency is prescaled by a factor of 32 */
624 RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRLA_PRESCALER_DIV32,
625 /** RTC input clock frequency is prescaled by a factor of 64 */
626 RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRLA_PRESCALER_DIV64,
627 /** RTC input clock frequency is prescaled by a factor of 128 */
628 RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRLA_PRESCALER_DIV128,
629 /** RTC input clock frequency is prescaled by a factor of 256 */
630 RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRLA_PRESCALER_DIV256,
631 /** RTC input clock frequency is prescaled by a factor of 512 */
632 RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRLA_PRESCALER_DIV512,
633 /** RTC input clock frequency is prescaled by a factor of 1024 */
634 RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRLA_PRESCALER_DIV1024,
635 };
636 #else
637 /**
638 * \brief RTC input clock prescaler settings.
639 *
640 * The available input clock prescaler values for the RTC count module.
641 */
642 enum rtc_count_prescaler {
643 /** RTC input clock frequency is prescaled by a factor of 1 */
644 RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRL_PRESCALER_DIV1,
645 /** RTC input clock frequency is prescaled by a factor of 2 */
646 RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRL_PRESCALER_DIV2,
647 /** RTC input clock frequency is prescaled by a factor of 4 */
648 RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRL_PRESCALER_DIV4,
649 /** RTC input clock frequency is prescaled by a factor of 8 */
650 RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRL_PRESCALER_DIV8,
651 /** RTC input clock frequency is prescaled by a factor of 16 */
652 RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRL_PRESCALER_DIV16,
653 /** RTC input clock frequency is prescaled by a factor of 32 */
654 RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRL_PRESCALER_DIV32,
655 /** RTC input clock frequency is prescaled by a factor of 64 */
656 RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRL_PRESCALER_DIV64,
657 /** RTC input clock frequency is prescaled by a factor of 128 */
658 RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRL_PRESCALER_DIV128,
659 /** RTC input clock frequency is prescaled by a factor of 256 */
660 RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRL_PRESCALER_DIV256,
661 /** RTC input clock frequency is prescaled by a factor of 512 */
662 RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRL_PRESCALER_DIV512,
663 /** RTC input clock frequency is prescaled by a factor of 1024 */
664 RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRL_PRESCALER_DIV1024,
665 };
666 #endif
667
668 /**
669 * \brief RTC Count event enable/disable structure.
670 *
671 * Event flags for the \ref rtc_count_enable_events() and
672 * \ref rtc_count_disable_events().
673 */
674 struct rtc_count_events {
675 /** Generate an output event on each overflow of the RTC count */
676 bool generate_event_on_overflow;
677 /** Generate an output event on a compare channel match against the RTC
678 * count */
679 bool generate_event_on_compare[RTC_NUM_OF_COMP16];
680 /** Generate an output event periodically at a binary division of the RTC
681 * counter frequency */
682 bool generate_event_on_periodic[8];
683 #ifdef FEATURE_RTC_TAMPER_DETECTION
684 /** Generate an output event on every tamper input */
685 bool generate_event_on_tamper;
686 /** Tamper input event and capture the COUNT value */
687 bool on_event_to_tamper;
688 #endif
689 };
690
691 #if !defined(__DOXYGEN__)
692 /**
693 * \brief Device structure.
694 */
695 struct rtc_module {
696 /** RTC hardware module */
697 Rtc *hw;
698 /** Operation mode of count */
699 enum rtc_count_mode mode;
700 #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED
701 /** Set if counter value should be continuously updated */
702 bool continuously_update;
703 #endif
704 # if RTC_COUNT_ASYNC == true
705 /** Pointers to callback functions */
706 volatile rtc_count_callback_t callbacks[_RTC_COUNT_CALLBACK_N];
707 /** Mask for registered callbacks */
708 volatile uint16_t registered_callback;
709 /** Mask for enabled callbacks */
710 volatile uint16_t enabled_callback;
711 # endif
712 };
713 #endif
714
715 /**
716 * \brief RTC Count configuration structure.
717 *
718 * Configuration structure for the RTC instance. This structure should
719 * be initialized using the \ref rtc_count_get_config_defaults() before any
720 * user configurations are set.
721 */
722 struct rtc_count_config {
723 /** Input clock prescaler for the RTC module */
724 enum rtc_count_prescaler prescaler;
725 /** Select the operation mode of the RTC */
726 enum rtc_count_mode mode;
727 /** If true, clears the counter value on compare match. Only available
728 * whilst running in 32-bit mode */
729 bool clear_on_match;
730 #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED
731 /** Continuously update the counter value so no synchronization is
732 * needed for reading */
733 bool continuously_update;
734 #endif
735 #if (SAML21XXXB) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30)
736 /** Enable count read synchronization. The COUNT value requires
737 * synchronization when reading. Disabling the synchronization
738 * will prevent the COUNT value from displaying the current value. */
739 bool enable_read_sync;
740 #endif
741
742 /** Array of Compare values. Not all Compare values are available in 32-bit
743 * mode */
744 uint32_t compare_values[RTC_NUM_OF_COMP16];
745 };
746
747
748 /**
749 * \name Configuration and Initialization
750 * @{
751 */
752
753 /**
754 * \brief Gets the RTC default configurations.
755 *
756 * Initializes the configuration structure to default values. This
757 * function should be called at the start of any RTC initialization.
758 *
759 * The default configuration is:
760 * - Input clock divided by a factor of 1024
761 * - RTC in 32-bit mode
762 * - Clear on compare match off
763 * - Continuously sync count register off
764 * - No event source on
765 * - All compare values equal 0
766 * - Count read synchronization is enabled for SAM L22
767 *
768 * \param[out] config Configuration structure to be initialized to default
769 * values
770 */
rtc_count_get_config_defaults(struct rtc_count_config * const config)771 static inline void rtc_count_get_config_defaults(
772 struct rtc_count_config *const config)
773 {
774 /* Sanity check argument */
775 Assert(config);
776
777 /* Set default into configuration structure */
778 config->prescaler = RTC_COUNT_PRESCALER_DIV_1024;
779 config->mode = RTC_COUNT_MODE_32BIT;
780 config->clear_on_match = false;
781
782 #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED
783 config->continuously_update = false;
784 #endif
785 #if (SAML21XXXB) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30)
786 config->enable_read_sync = true;
787 #endif
788
789 for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
790 config->compare_values[i] = 0;
791 }
792 }
793
794 void rtc_count_reset(struct rtc_module *const module);
795 void rtc_count_enable(struct rtc_module *const module);
796 void rtc_count_disable(struct rtc_module *const module);
797
798 #if (RTC_INST_NUM > 1) && !defined(__DOXYGEN__)
799 /**
800 * \internal Find the index of given RTC module instance.
801 *
802 * \param[in] RTC module instance pointer
803 *
804 * \return Index of the given AC module instance.
805 */
_rtc_get_inst_index(Rtc * const hw)806 uint8_t _rtc_get_inst_index(
807 Rtc *const hw)
808 {
809 /* List of available RTC modules */
810 static Rtc *const rtc_modules[RTC_INST_NUM] = RTC_INSTS;
811
812 /* Find index for RTC instance */
813 for (uint32_t i = 0; i < RTC_INST_NUM; i++) {
814 if (hw == rtc_modules[i]) {
815 return i;
816 }
817 }
818
819 /* Invalid data given */
820 Assert(false);
821 return 0;
822 }
823 #endif /* (RTC_INST_NUM > 1) && !defined(__DOXYGEN__) */
824
825 enum status_code rtc_count_init(
826 struct rtc_module *const module,
827 Rtc *const hw,
828 const struct rtc_count_config *const config);
829
830 enum status_code rtc_count_frequency_correction(
831 struct rtc_module *const module,
832 const int8_t value);
833
834 /** @} */
835
836 /** \name Count and Compare Value Management
837 * @{
838 */
839 enum status_code rtc_count_set_count(
840 struct rtc_module *const module,
841 const uint32_t count_value);
842
843 uint32_t rtc_count_get_count(struct rtc_module *const module);
844
845 enum status_code rtc_count_set_compare(
846 struct rtc_module *const module,
847 const uint32_t comp_value,
848 const enum rtc_count_compare comp_index);
849
850 enum status_code rtc_count_get_compare(
851 struct rtc_module *const module,
852 uint32_t *const comp_value,
853 const enum rtc_count_compare comp_index);
854
855 enum status_code rtc_count_set_period(
856 struct rtc_module *const module,
857 uint16_t period_value);
858
859 enum status_code rtc_count_get_period(
860 struct rtc_module *const module,
861 uint16_t *const period_value);
862
863 /** @} */
864
865
866 /** \name Status Management
867 * @{
868 */
869
870 /**
871 * \brief Check if an RTC overflow has occurred.
872 *
873 * Checks the overflow flag in the RTC. The flag is set when there
874 * is an overflow in the clock.
875 *
876 * \param[in,out] module RTC hardware module
877 *
878 * \return Overflow state of the RTC module.
879 *
880 * \retval true If the RTC count value has overflowed
881 * \retval false If the RTC count value has not overflowed
882 */
883
rtc_count_is_overflow(struct rtc_module * const module)884 static inline bool rtc_count_is_overflow(struct rtc_module *const module)
885 {
886 /* Sanity check arguments */
887 Assert(module);
888 Assert(module->hw);
889
890 Rtc *const rtc_module = module->hw;
891
892 /* Return status of flag */
893 return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_OVF);
894 }
895
896 /**
897 * \brief Clears the RTC overflow flag.
898 *
899 * Clears the RTC module counter overflow flag, so that new overflow conditions
900 * can be detected.
901 *
902 * \param[in,out] module RTC hardware module
903 */
rtc_count_clear_overflow(struct rtc_module * const module)904 static inline void rtc_count_clear_overflow(struct rtc_module *const module)
905 {
906 /* Sanity check arguments */
907 Assert(module);
908 Assert(module->hw);
909
910 Rtc *const rtc_module = module->hw;
911
912 /* Clear OVF flag */
913 rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF;
914 }
915
916 #ifdef FEATURE_RTC_PERIODIC_INT
917 /**
918 * \brief Check if an RTC periodic interval interrupt has occurred.
919 *
920 * Checks the periodic interval flag in the RTC.
921 *
922 * \param[in,out] module RTC hardware module
923 * \param[in] n RTC periodic interval interrupt
924 *
925 * \return Periodic interval interrupt state of the RTC module.
926 *
927 * \retval true RTC periodic interval interrupt occurs
928 * \retval false RTC periodic interval interrupt doesn't occur
929 */
rtc_count_is_periodic_interval(struct rtc_module * const module,enum rtc_count_periodic_interval n)930 static inline bool rtc_count_is_periodic_interval(struct rtc_module *const module,
931 enum rtc_count_periodic_interval n)
932 {
933 /* Sanity check arguments */
934 Assert(module);
935 Assert(module->hw);
936
937 Rtc *const rtc_module = module->hw;
938
939 /* Return status of flag */
940 return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_PER(1 << n));
941 }
942
943 /**
944 * \brief Clears the RTC periodic interval flag.
945 *
946 * Clears the RTC module counter periodic interval flag, so that new periodic
947 * interval conditions can be detected.
948 *
949 * \param[in,out] module RTC hardware module
950 * \param[in] n RTC periodic interval interrupt
951 */
rtc_count_clear_periodic_interval(struct rtc_module * const module,enum rtc_count_periodic_interval n)952 static inline void rtc_count_clear_periodic_interval(struct rtc_module *const module,
953 enum rtc_count_periodic_interval n)
954 {
955 /* Sanity check arguments */
956 Assert(module);
957 Assert(module->hw);
958
959 Rtc *const rtc_module = module->hw;
960
961 /* Clear periodic interval flag */
962 rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_PER(1 << n);
963 }
964 #endif
965 bool rtc_count_is_compare_match(
966 struct rtc_module *const module,
967 const enum rtc_count_compare comp_index);
968
969 enum status_code rtc_count_clear_compare_match(
970 struct rtc_module *const module,
971 const enum rtc_count_compare comp_index);
972
973 /** @} */
974
975
976 /**
977 * \name Event Management
978 * @{
979 */
980
981 /**
982 * \brief Enables an RTC event output.
983 *
984 * Enables one or more output events from the RTC module. See
985 * \ref rtc_count_events for a list of events this module supports.
986 *
987 * \note Events cannot be altered while the module is enabled.
988 *
989 * \param[in,out] module RTC hardware module
990 * \param[in] events Struct containing flags of events to enable
991 */
rtc_count_enable_events(struct rtc_module * const module,struct rtc_count_events * const events)992 static inline void rtc_count_enable_events(
993 struct rtc_module *const module,
994 struct rtc_count_events *const events)
995 {
996 /* Sanity check arguments */
997 Assert(module);
998 Assert(module->hw);
999
1000 Rtc *const rtc_module = module->hw;
1001
1002 uint32_t event_mask = 0;
1003
1004 /* Check if the user has requested an overflow event */
1005 if (events->generate_event_on_overflow) {
1006 event_mask |= RTC_MODE0_EVCTRL_OVFEO;
1007 }
1008
1009 /* Check if the user has requested any compare events */
1010 for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
1011 if (events->generate_event_on_compare[i]) {
1012 event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i);
1013 }
1014 }
1015
1016 /* Check if the user has requested any periodic events */
1017 for (uint8_t i = 0; i < 8; i++) {
1018 if (events->generate_event_on_periodic[i]) {
1019 event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i);
1020 }
1021 }
1022
1023 #ifdef FEATURE_RTC_TAMPER_DETECTION
1024 /* Check if the user has requested a tamper event output. */
1025 if (events->generate_event_on_tamper) {
1026 event_mask |= RTC_MODE0_EVCTRL_TAMPEREO;
1027 }
1028
1029 /* Check if the user has requested a tamper event input. */
1030 if (events->on_event_to_tamper) {
1031 event_mask |= RTC_MODE0_EVCTRL_TAMPEVEI;
1032 }
1033 #endif
1034
1035 /* Enable given event(s). */
1036 rtc_module->MODE0.EVCTRL.reg |= event_mask;
1037 }
1038
1039 /**
1040 * \brief Disables an RTC event output.
1041 *
1042 * Disabled one or more output events from the RTC module. See
1043 * \ref rtc_count_events for a list of events this module supports.
1044 *
1045 * \note Events cannot be altered while the module is enabled.
1046 *
1047 * \param[in,out] module RTC hardware module
1048 * \param[in] events Struct containing flags of events to disable
1049 */
rtc_count_disable_events(struct rtc_module * const module,struct rtc_count_events * const events)1050 static inline void rtc_count_disable_events(
1051 struct rtc_module *const module,
1052 struct rtc_count_events *const events)
1053 {
1054 /* Sanity check arguments */
1055 Assert(module);
1056 Assert(module->hw);
1057
1058 Rtc *const rtc_module = module->hw;
1059
1060 uint32_t event_mask = 0;
1061
1062 /* Check if the user has requested an overflow event */
1063 if (events->generate_event_on_overflow) {
1064 event_mask |= RTC_MODE0_EVCTRL_OVFEO;
1065 }
1066
1067 /* Check if the user has requested any compare events */
1068 for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
1069 if (events->generate_event_on_compare[i]) {
1070 event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i);
1071 }
1072 }
1073
1074 /* Check if the user has requested any periodic events */
1075 for (uint8_t i = 0; i < 8; i++) {
1076 if (events->generate_event_on_periodic[i]) {
1077 event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i);
1078 }
1079 }
1080
1081 #ifdef FEATURE_RTC_TAMPER_DETECTION
1082 /* Check if the user has requested a tamper event output. */
1083 if (events->generate_event_on_tamper) {
1084 event_mask |= RTC_MODE0_EVCTRL_TAMPEREO;
1085 }
1086
1087 /* Check if the user has requested a tamper event input. */
1088 if (events->on_event_to_tamper) {
1089 event_mask |= RTC_MODE0_EVCTRL_TAMPEVEI;
1090 }
1091 #endif
1092
1093 /* Disable given event(s). */
1094 rtc_module->MODE0.EVCTRL.reg &= ~event_mask;
1095 }
1096
1097 /** @} */
1098
1099 #ifdef FEATURE_RTC_GENERAL_PURPOSE_REG
1100 /**
1101 * \name RTC General Purpose Registers
1102 * @{
1103 */
1104
1105 /**
1106 * \brief Write a value into general purpose register.
1107 *
1108 * \param[in] module Pointer to the software instance struct
1109 * \param[in] n General purpose type
1110 * \param[in] index General purpose register index (0..3)
1111 *
1112 */
rtc_write_general_purpose_reg(struct rtc_module * const module,const uint8_t index,uint32_t value)1113 static inline void rtc_write_general_purpose_reg(
1114 struct rtc_module *const module,
1115 const uint8_t index,
1116 uint32_t value)
1117 {
1118 /* Sanity check arguments */
1119 Assert(module);
1120 Assert(module->hw);
1121 Assert(index <= 3);
1122
1123 Rtc *const rtc_module = module->hw;
1124
1125 rtc_module->MODE0.GP[index].reg = value;
1126 }
1127
1128 /**
1129 * \brief Read the value from general purpose register.
1130 *
1131 * \param[in] module Pointer to the software instance struct
1132 * \param[in] index General purpose register index (0..3)
1133 *
1134 * \return Value of general purpose register.
1135 */
rtc_read_general_purpose_reg(struct rtc_module * const module,const uint8_t index)1136 static inline uint32_t rtc_read_general_purpose_reg(
1137 struct rtc_module *const module,
1138 const uint8_t index)
1139 {
1140 /* Sanity check arguments */
1141 Assert(module);
1142 Assert(module->hw);
1143 Assert(index <= 3);
1144
1145 Rtc *const rtc_module = module->hw;
1146
1147 return rtc_module->MODE0.GP[index].reg;
1148 }
1149
1150 /** @} */
1151 #endif
1152
1153 #ifdef FEATURE_RTC_TAMPER_DETECTION
1154 #include "rtc_tamper.h"
1155 /**
1156 * \brief Get the tamper stamp value.
1157 *
1158 * \param[in,out] module Pointer to the software instance struct
1159 *
1160 * \return The current tamper stamp value as a 32-bit unsigned integer.
1161 */
1162 uint32_t rtc_tamper_get_stamp (struct rtc_module *const module);
1163 #endif
1164
1165
1166 /** @} */
1167
1168 #ifdef __cplusplus
1169 }
1170 #endif
1171
1172 /**
1173 * \page asfdoc_sam0_rtc_count_extra Extra Information for RTC COUNT Driver
1174 *
1175 * \section asfdoc_sam0_rtc_count_extra_acronyms Acronyms
1176 * Below is a table listing the acronyms used in this module, along with their
1177 * intended meanings.
1178 *
1179 * <table>
1180 * <tr>
1181 * <th>Acronym</td>
1182 * <th>Description</td>
1183 * </tr>
1184 * <tr>
1185 * <td>RTC</td>
1186 * <td>Real Time Counter</td>
1187 * </tr>
1188 * <tr>
1189 * <td>PPM</td>
1190 * <td>Part Per Million</td>
1191 * </tr>
1192 * <tr>
1193 * <td>RC</td>
1194 * <td>Resistor/Capacitor</td>
1195 * </tr>
1196 * </table>
1197 *
1198 *
1199 * \section asfdoc_sam0_rtc_count_extra_dependencies Dependencies
1200 * This driver has the following dependencies:
1201 *
1202 * - None
1203 *
1204 *
1205 * \section asfdoc_sam0_rtc_count_extra_errata Errata
1206 * There are no errata related to this driver.
1207 *
1208 *
1209 * \section asfdoc_sam0_rtc_count_extra_history Module History
1210 * An overview of the module history is presented in the table below, with
1211 * details on the enhancements and fixes made to the module since its first
1212 * release. The current version of this corresponds to the newest version in
1213 * the table.
1214 *
1215 * <table>
1216 * <tr>
1217 * <th>Changelog</th>
1218 * </tr>
1219 * <tr>
1220 * <td>Added support for SAM C21</td>
1221 * </tr>
1222 * <tr>
1223 * <td>Added support for SAM L21/L22</td>
1224 * </tr>
1225 * <tr>
1226 * <td>Added support for SAM R30</td>
1227 * </tr>
1228 * <tr>
1229 * <td>Added support for RTC tamper feature</td>
1230 * </tr>
1231 * <tr>
1232 * <td>
1233 * Added driver instance parameter to all API function calls, except
1234 * get_config_defaults
1235 * </td>
1236 * </tr>
1237 * <tr>
1238 * <td>
1239 * Updated initialization function to also enable the digital interface
1240 * clock to the module if it is disabled
1241 * </td>
1242 * </tr>
1243 * <tr>
1244 * <td>Initial Release</td>
1245 * </tr>
1246 * </table>
1247 */
1248
1249 /**
1250 * \page asfdoc_sam0_rtc_count_exqsg Examples for RTC (COUNT) Driver
1251 *
1252 * This is a list of the available Quick Start guides (QSGs) and example
1253 * applications for \ref asfdoc_sam0_rtc_count_group. QSGs are simple
1254 * examples with step-by-step instructions to configure and use this driver in a
1255 * selection of use cases. Note that a QSG can be compiled as a standalone
1256 * application or be added to the user application.
1257 *
1258 * - \subpage asfdoc_sam0_rtc_count_basic_use_case
1259 * \if RTC_COUNT_CALLBACK_MODE
1260 * - \subpage asfdoc_sam0_rtc_count_callback_use_case
1261 * \endif
1262 * - \subpage asfdoc_sam0_rtc_tamper_dma_use_case
1263 *
1264 * \page asfdoc_sam0_rtc_count_document_revision_history Document Revision History
1265 *
1266 * <table>
1267 * <tr>
1268 * <th>Doc. Rev.</th>
1269 * <th>Date</th>
1270 * <th>Comments</th>
1271 * </tr>
1272 * <tr>
1273 * <td>42111E</td>
1274 * <td>12/2015</td>
1275 * <td>Added support for SAM L21/L22, SAM C21, SAM D09, SAMR30 and SAM DA1</td>
1276 * </tr>
1277 * <tr>
1278 * <td>42111D</td>
1279 * <td>12/2014</td>
1280 * <td>Added support for SAM R21 and SAM D10/D11</td>
1281 * </tr>
1282 * <tr>
1283 * <td>42111C</td>
1284 * <td>01/2014</td>
1285 * <td>Added support for SAM D21</td>
1286 * </tr>
1287 * <tr>
1288 * <td>42111B</td>
1289 * <td>06/2013</td>
1290 * <td>Added additional documentation on the event system. Corrected
1291 * documentation typos.</td>
1292 * </tr>
1293 * <tr>
1294 * <td>42111A</td>
1295 * <td>06/2013</td>
1296 * <td>Initial release</td>
1297 * </tr>
1298 * </table>
1299 */
1300
1301 #endif /* RTC_COUNT_H_INCLUDED */
1302