1 /**
2  * \file
3  *
4  * \brief SAM Sigma-Delta Analog-to-Digital Converter (SDADC) Driver
5  *
6  * Copyright (C) 2015 Atmel Corporation. All rights reserved.
7  *
8  * \asf_license_start
9  *
10  * \page License
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions are met:
14  *
15  * 1. Redistributions of source code must retain the above copyright notice,
16  *    this list of conditions and the following disclaimer.
17  *
18  * 2. Redistributions in binary form must reproduce the above copyright notice,
19  *    this list of conditions and the following disclaimer in the documentation
20  *    and/or other materials provided with the distribution.
21  *
22  * 3. The name of Atmel may not be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * 4. This software may only be redistributed and used in connection with an
26  *    Atmel microcontroller product.
27  *
28  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  *
40  * \asf_license_stop
41  *
42  */
43 /*
44  * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45  */
46 
47 #include "sdadc.h"
48 
49 /**
50 * \internal Configure MUX settings for the analog pins
51 *
52 * This function will set the given SDADC input pins
53 * to the analog function in the pinmux, giving
54 * the SDADC access to the analog signal
55 *
56 * \param [in] pin AINxx pin to configure
57 */
_sdadc_configure_ain_pin(uint32_t pin)58 static inline void _sdadc_configure_ain_pin(uint32_t pin)
59 {
60 	/* Pinmapping table for AINxx -> GPIO pin number */
61 	const uint32_t pinmapping[] = {
62 #if (SAMC21E)
63 			PIN_PA06B_SDADC_INN0, PIN_PA07B_SDADC_INP0,
64 #elif (SAMC21G)
65 			PIN_PA06B_SDADC_INN0, PIN_PA07B_SDADC_INP0,
66 			PIN_PB08B_SDADC_INN1, PIN_PB09B_SDADC_INP1,
67 #elif (SAMC21J)
68 			PIN_PA06B_SDADC_INN0, PIN_PA07B_SDADC_INP0,
69 			PIN_PB08B_SDADC_INN1, PIN_PB09B_SDADC_INP1,
70 			PIN_PB06B_SDADC_INN2, PIN_PB07B_SDADC_INP2,
71 #else
72 #  error SDADC pin mappings are not defined for this device.
73 #endif
74 	};
75 
76 	uint32_t pin_map_result;
77 
78 	struct system_pinmux_config config;
79 	system_pinmux_get_config_defaults(&config);
80 
81 	config.input_pull   = SYSTEM_PINMUX_PIN_PULL_NONE;
82 	config.mux_position = 1;
83 
84 	pin_map_result = pinmapping[pin * 2];
85 	system_pinmux_pin_set_config(pin_map_result, &config);
86 
87 	pin_map_result = pinmapping[pin * 2 + 1];
88 	system_pinmux_pin_set_config(pin_map_result, &config);
89 }
90 
91 /**
92  * \internal Writes an SDADC configuration to the hardware module
93  *
94  * Writes out a given SDADC module configuration to the hardware module.
95  *
96  * \param[out] module_inst  Pointer to the SDADC software instance struct
97  * \param[in]  config       Pointer to configuration struct
98  *
99  * \return Status of the configuration procedure.
100  * \retval STATUS_OK               The configuration was successful
101  * \retval STATUS_ERR_INVALID_ARG  Invalid argument(s) were provided
102  */
_sdadc_set_config(struct sdadc_module * const module_inst,struct sdadc_config * const config)103 static enum status_code _sdadc_set_config(
104 		struct sdadc_module *const module_inst,
105 		struct sdadc_config *const config)
106 {
107 	/* Get the hardware module pointer */
108 	Sdadc *const sdadc_module = module_inst->hw;
109 
110 	/* Configure GCLK channel and enable clock */
111 	struct system_gclk_chan_config gclk_chan_conf;
112 	system_gclk_chan_get_config_defaults(&gclk_chan_conf);
113 	gclk_chan_conf.source_generator = config->clock_source;
114 	system_gclk_chan_set_config(SDADC_GCLK_ID, &gclk_chan_conf);
115 	system_gclk_chan_enable(SDADC_GCLK_ID);
116 
117 	/* Setup pinmuxing for analog inputs */
118 	_sdadc_configure_ain_pin(config->mux_input);
119 
120 	/* Configure run in standby */
121 	sdadc_module->CTRLA.reg = (config->run_in_standby << SDADC_CTRLA_RUNSTDBY_Pos)
122 			| (config->on_command << SDADC_CTRLA_ONDEMAND_Pos);
123 
124 	while (sdadc_is_syncing(module_inst)) {
125 		/* Wait for synchronization */
126 	}
127 
128 	/* Configure reference */
129 	sdadc_module->REFCTRL.reg = (config->reference.ref_sel) | (config->reference.ref_range) |
130 						(config->reference.on_ref_buffer << SDADC_REFCTRL_ONREFBUF_Pos);
131 
132 	/* Configure CTRLB */
133 	sdadc_module->CTRLB.reg =
134 			(config->skip_count << SDADC_CTRLB_SKPCNT_Pos) |
135 			(config->clock_prescaler / 2 - 1) | config->osr;
136 
137 	while (sdadc_is_syncing(module_inst)) {
138 		/* Wait for synchronization */
139 	}
140 
141 	/* Configure CTRLC */
142 	sdadc_module->CTRLC.reg =
143 			(config->freerunning << SDADC_CTRLC_FREERUN_Pos);
144 
145 	/* Configure SEQCTRL */
146 	sdadc_module->SEQCTRL.reg =
147 			(config->seq_enable[0]) | (config->seq_enable[1] << 1) | (config->seq_enable[2] << 2);
148 
149 	/* Check validity of window thresholds */
150 	if (config->window.window_mode != SDADC_WINDOW_MODE_DISABLE) {
151 		if (config->window.window_lower_value > (int32_t)(SDADC_RESULT_RESULT_Msk / 2) ||
152 			config->window.window_lower_value < -(int32_t)(SDADC_RESULT_RESULT_Msk / 2 + 1) ||
153 			config->window.window_upper_value > (int32_t)(SDADC_RESULT_RESULT_Msk / 2) ||
154 			config->window.window_upper_value < -(int32_t)(SDADC_RESULT_RESULT_Msk / 2 + 1)) {
155 			/* Invalid value */
156 			return STATUS_ERR_INVALID_ARG;
157 		} else if (config->window.window_lower_value > (int32_t)SDADC_RESULT_RESULT_Msk ||
158 				config->window.window_upper_value > (int32_t)SDADC_RESULT_RESULT_Msk){
159 			/* Invalid value */
160 			return STATUS_ERR_INVALID_ARG;
161 		}
162 	}
163 
164 	while (sdadc_is_syncing(module_inst)) {
165 		/* Wait for synchronization */
166 	}
167 
168 	/* Configure window mode */
169 	sdadc_module->WINCTRL.reg = config->window.window_mode;
170 
171 	while (sdadc_is_syncing(module_inst)) {
172 		/* Wait for synchronization */
173 	}
174 
175 	/* Configure lower threshold */
176 	sdadc_module->WINLT.reg =
177 			config->window.window_lower_value << SDADC_WINLT_WINLT_Pos;
178 
179 	while (sdadc_is_syncing(module_inst)) {
180 		/* Wait for synchronization */
181 	}
182 
183 	/* Configure lower threshold */
184 	sdadc_module->WINUT.reg = config->window.window_upper_value <<
185 			SDADC_WINUT_WINUT_Pos;
186 
187 	while (sdadc_is_syncing(module_inst)) {
188 		/* Wait for synchronization */
189 	}
190 
191 	/* Configure pin scan mode and positive and negative input pins */
192 	sdadc_module->INPUTCTRL.reg = config->mux_input;
193 
194 	/* Configure events */
195 	sdadc_module->EVCTRL.reg = config->event_action;
196 
197 	/* Disable all interrupts */
198 	sdadc_module->INTENCLR.reg = (1 << SDADC_INTENCLR_WINMON_Pos) |
199 			(1 << SDADC_INTENCLR_OVERRUN_Pos) | (1 << SDADC_INTENCLR_RESRDY_Pos);
200 
201 	/* Make sure offset correction value is valid */
202 	if (config->correction.offset_correction > (int32_t)(SDADC_OFFSETCORR_MASK / 2) ||
203 		config->correction.offset_correction < - (int32_t)(SDADC_OFFSETCORR_MASK / 2 + 1)) {
204 		return STATUS_ERR_INVALID_ARG;
205 	} else {
206 		while (sdadc_is_syncing(module_inst)) {
207 			/* Wait for synchronization */
208 		}
209 
210 		/* Set offset correction value */
211 		sdadc_module->OFFSETCORR.reg = config->correction.offset_correction <<
212 				SDADC_OFFSETCORR_OFFSETCORR_Pos;
213 	}
214 
215 	/* Make sure gain_correction value is valid */
216 	if (config->correction.gain_correction > SDADC_GAINCORR_MASK) {
217 		return STATUS_ERR_INVALID_ARG;
218 	} else {
219 		while (sdadc_is_syncing(module_inst)) {
220 			/* Wait for synchronization */
221 		}
222 
223 		/* Set gain correction value */
224 		sdadc_module->GAINCORR.reg = config->correction.gain_correction <<
225 				SDADC_GAINCORR_GAINCORR_Pos;
226 	}
227 
228 	/* Make sure shift_correction value is valid */
229 	if (config->correction.shift_correction > SDADC_SHIFTCORR_MASK) {
230 		return STATUS_ERR_INVALID_ARG;
231 	} else {
232 		while (sdadc_is_syncing(module_inst)) {
233 			/* Wait for synchronization */
234 		}
235 
236 		/* Set shift correction value */
237 		sdadc_module->SHIFTCORR.reg = config->correction.shift_correction <<
238 				SDADC_SHIFTCORR_SHIFTCORR_Pos;
239 	}
240 
241 	return STATUS_OK;
242 }
243 
244 /**
245  * \brief Initializes the SDADC.
246  *
247  * Initializes the SDADC device struct and the hardware module based on the
248  * given configuration struct values.
249  *
250  * \param[out] module_inst Pointer to the SDADC software instance struct
251  * \param[in]  hw          Pointer to the SDADC module instance
252  * \param[in]  config      Pointer to the configuration struct
253  *
254  * \return Status of the initialization procedure.
255  * \retval STATUS_OK                The initialization was successful
256  * \retval STATUS_ERR_INVALID_ARG   Invalid argument(s) were provided
257  * \retval STATUS_BUSY          The module is busy with a reset operation
258  * \retval STATUS_ERR_DENIED        The module is enabled
259  */
sdadc_init(struct sdadc_module * const module_inst,Sdadc * hw,struct sdadc_config * config)260 enum status_code sdadc_init(
261 		struct sdadc_module *const module_inst,
262 		Sdadc *hw,
263 		struct sdadc_config *config)
264 {
265 	/* Sanity check arguments */
266 	Assert(module_inst);
267 	Assert(hw);
268 	Assert(config);
269 
270 	/* Associate the software module instance with the hardware module */
271 	module_inst->hw = hw;
272 
273 	/* Turn on the digital interface clock */
274 	system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_SDADC);
275 
276 	if (hw->CTRLA.reg & SDADC_CTRLA_SWRST) {
277 		/* We are in the middle of a reset. Abort. */
278 		return STATUS_BUSY;
279 	}
280 
281 	if (hw->CTRLA.reg & SDADC_CTRLA_ENABLE) {
282 		/* Module must be disabled before initialization. Abort. */
283 		return STATUS_ERR_DENIED;
284 	}
285 
286 	/* Store the selected reference for later use */
287 	module_inst->reference = config->reference;
288 
289 #if SDADC_CALLBACK_MODE == true
290 	for (uint8_t i = 0; i < SDADC_CALLBACK_N; i++) {
291 		module_inst->callback[i] = NULL;
292 	};
293 
294 	module_inst->registered_callback_mask = 0;
295 	module_inst->enabled_callback_mask = 0;
296 	module_inst->remaining_conversions = 0;
297 	module_inst->job_status = STATUS_OK;
298 
299 	_sdadc_instances[0] = module_inst;
300 
301 	if (config->event_action == SDADC_EVENT_ACTION_DISABLED &&
302 			!config->freerunning) {
303 		module_inst->software_trigger = true;
304 	} else {
305 		module_inst->software_trigger = false;
306 	}
307 #endif
308 
309 	/* Write configuration to module */
310 	return _sdadc_set_config(module_inst, config);
311 }
312