1 /** 2 * \file 3 * 4 * \brief SAM System related functionality 5 * 6 * Copyright (C) 2015-2016 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 /* 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45 */ 46 #ifndef SYSTEM_H_INCLUDED 47 #define SYSTEM_H_INCLUDED 48 49 /** 50 * \defgroup asfdoc_samb_system_group SAM System (SYSTEM) Driver 51 * 52 * This driver for Atmel® | SMART SAM devices provides an interface for the configuration 53 * and management of the device's system relation functionality, necessary for 54 * the basic device operation. This is not limited to a single peripheral, but 55 * extends across multiple hardware peripherals. 56 * 57 * The following peripherals are used by this module 58 * - SYSCTRL (System Control) 59 * 60 * The following devices can use this module: 61 * - Atmel | SMART SAM B11 62 * 63 * The outline of this documentation is as follows: 64 * - \ref asfdoc_samb_system_prerequisites 65 * - \ref asfdoc_samb_system_module_overview 66 * - \ref asfdoc_samb_system_special_considerations 67 * - \ref asfdoc_samb_system_extra_info 68 * - \ref asfdoc_samb_system_examples 69 * - \ref asfdoc_samb_system_api_overview 70 * 71 * 72 * \section asfdoc_samb_system_prerequisites Prerequisites 73 * 74 * There are no prerequisites for this module. 75 * 76 * 77 * \section asfdoc_samb_system_module_overview Module Overview 78 * 79 * The System driver provides a collection of interfaces between the user 80 * application logic, and the core device functionality (such as clocks, reset 81 * cause determination, etc.) that is required for all applications. It contains 82 * a number of sub-modules that control one specific aspect of the device: 83 * 84 * 85 * \section asfdoc_samb_system_special_considerations Special Considerations 86 * 87 * Most of the functions in this driver have device specific restrictions and 88 * caveats; refer to your device datasheet. 89 * 90 * 91 * \section asfdoc_samb_system_extra_info Extra Information 92 * 93 * For extra information, see \ref asfdoc_samb_system_extra. This includes: 94 * - \ref asfdoc_samb_system_extra_acronyms 95 * - \ref asfdoc_samb_system_extra_dependencies 96 * - \ref asfdoc_samb_system_extra_errata 97 * - \ref asfdoc_samb_system_extra_history 98 * 99 * 100 * \section asfdoc_samb_system_examples Examples 101 * 102 * For SYSTEM module related examples, refer to the sub-modules listed in 103 * the \ref asfdoc_samb_system_module_overview "system module overview". 104 * 105 * For a list of examples related to this driver, see 106 * \ref asfdoc_samb_drivers_power_exqsg. 107 * 108 * 109 * \section asfdoc_samb_system_api_overview API Overview 110 * @{ 111 */ 112 113 #include <compiler.h> 114 115 #ifdef __cplusplus 116 extern "C" { 117 #endif 118 119 120 /* ISR RAM table address, definition from rom code, */ 121 #define ISR_RAM_MAP_START_ADDRESS (0x10000000) 122 /* ISR initialization status located in offset 0, definition from rom code*/ 123 #define ISR_RAM_MAP_INITIALIZED (0x20101985) 124 125 /** 126 * \brief ISR RAM table index 127 * 128 * Enum for the index of the ISR in RAm. 129 * 130 */ 131 enum ram_isr_table_index { 132 RAM_ISR_TABLE_RESET_INDEX = 1, 133 RAM_ISR_TABLE_NMI_INDEX = 2, 134 RAM_ISR_TABLE_HARDFAULT_INDEX = 3, 135 RAM_ISR_TABLE_SVC_INDEX = 11, 136 RAM_ISR_TABLE_PENDSV_INDEX = 14, 137 RAM_ISR_TABLE_SYSTICK_INDEX = 15, 138 RAM_ISR_TABLE_UARTRX0_INDEX = 16, 139 RAM_ISR_TABLE_UARTTX0_INDEX = 17, 140 RAM_ISR_TABLE_UARTRX1_INDEX = 18, 141 RAM_ISR_TABLE_UARTTX1_INDEX = 19, 142 RAM_ISR_TABLE_SPIRX0_INDEX = 20, 143 RAM_ISR_TABLE_SPITX0_INDEX = 21, 144 RAM_ISR_TABLE_SPIRX1_INDEX = 22, 145 RAM_ISR_TABLE_SPITX1_INDEX = 23, 146 RAM_ISR_TABLE_I2CRX0_INDEX = 24, 147 RAM_ISR_TABLE_I2CTX0_INDEX = 25, 148 RAM_ISR_TABLE_I2CRX1_INDEX = 26, 149 RAM_ISR_TABLE_I2CTX1_INDEX = 27, 150 RAM_ISR_TABLE_WDT0_INDEX = 28, 151 RAM_ISR_TABLE_WDT1_INDEX = 29, 152 RAM_ISR_TABLE_DUALTIMER_INDEX = 30, 153 RAM_ISR_TABLE_BLE_PERIPH_REGS_INDEX = 31, 154 RAM_ISR_TABLE_SECURITY_INDEX = 32, 155 RAM_ISR_TABLE_EFUSE_OUT_OF_RESET_INDEX = 33, 156 RAM_ISR_TABLE_SPI_FLASH_INDEX = 34, 157 RAM_ISR_TABLE_LP_CLK_CAL_DONE_INDEX = 35, 158 RAM_ISR_TABLE_BROWNOUT_DETECTED_INDEX = 36, 159 RAM_ISR_TABLE_BLE_CORE_RESET_INDEX = 37, 160 RAM_ISR_TABLE_BLE_LP_CORE_RESET_INDEX = 38, 161 RAM_ISR_TABLE_PORT0_COMB_INDEX = 39, 162 RAM_ISR_TABLE_PORT1_COMB_INDEX = 40, 163 RAM_ISR_TABLE_PORT2_COMB_INDEX = 41, 164 RAM_ISR_TABLE_TIMER0_INDEX = 42, 165 RAM_ISR_TABLE_AON_SLEEP_TIMER_INDEX = 43, 166 RAM_ISR_TABLE_BLE_OSC_EN_INDEX = 44, 167 RAM_ISR_TABLE_BLE_WAKEUP_LP_INDEX = 45, 168 RAM_ISR_TABLE_RXTX_SEQ_SLEEP_INDEX = 46, 169 RAM_ISR_TABLE_BLE_CORE_INDEX = 47, 170 }; 171 172 /** 173 * \brief SYSTEM peripheral enum 174 * 175 * Enum for the possible peripheral for the system. 176 * 177 */ 178 enum system_peripheral { 179 /** SPI Flash */ 180 PERIPHERAL_SPI_FLASH, 181 /** SPI0 Core */ 182 PERIPHERAL_SPI0_CORE, 183 /** SPI1 Core */ 184 PERIPHERAL_SPI1_CORE, 185 /** I2C0 Core */ 186 PERIPHERAL_I2C0_CORE, 187 /** ARM Dual Timer */ 188 PERIPHERAL_DUALT_TIMER, 189 /** GPIO Controller */ 190 PERIPHERAL_GPIO_CLK, 191 /** ARM Timer */ 192 PERIPHERAL_TIMER, 193 /** WDT0 */ 194 PERIPHERAL_WDT0, 195 /** WDT1 */ 196 PERIPHERAL_WDT1, 197 /** UART0 Core */ 198 PERIPHERAL_UART0_CORE, 199 /** UART0 Interface */ 200 PERIPHERAL_UART0_IF, 201 /** UART1 Core */ 202 PERIPHERAL_UART1_CORE, 203 /** UART1 Interface */ 204 PERIPHERAL_UART1_IF, 205 /** NVIC */ 206 PERIPHERAL_NVIC, 207 /** IDRAM1 Glue Logic */ 208 PERIPHERAL_IDRAM1, 209 /** IDRAM2 Glue Logic */ 210 PERIPHERAL_IDRAM2, 211 /** ROM */ 212 PERIPHERAL_ROM, 213 /** Low Power Clock Calibration Interface */ 214 PERIPHERAL_LOW_POWER_IF, 215 /** AON Wrapper */ 216 PERIPHERAL_AON_WRAPPER, 217 /** ARM PCLK */ 218 PERIPHERAL_ARM_PCLK, 219 /** ARM Gated PCLK */ 220 PERIPHERAL_ARM_GATED_PCLK, 221 /** ARM BLE 8K Retention Memory */ 222 PERIPHERAL_ARM_BLE, 223 /** Quad Decoder 0 */ 224 PERIPHERAL_QDEC0, 225 /** Quad Decoder 1 */ 226 PERIPHERAL_QDEC1, 227 /** Quad Decoder 2 */ 228 PERIPHERAL_QDEC2, 229 /** I2C1 Core */ 230 PERIPHERAL_I2C1_CORE, 231 /** Low Power Clock Calibration Core */ 232 PERIPHERAL_LOW_POWER_CORE, 233 234 /* LPMCU_MISC_REGS_LPMCU_CLOCK_ENABLES_1 */ 235 /** EFUSE1 */ 236 PERIPHERAL_EFUSE1, 237 /** EFUSE2 */ 238 PERIPHERAL_EFUSE2, 239 /** EFUSE3 */ 240 PERIPHERAL_EFUSE3, 241 /** EFUSE4 */ 242 PERIPHERAL_EFUSE4, 243 /** EFUSE5 */ 244 PERIPHERAL_EFUSE5, 245 /** EFUSE6 */ 246 PERIPHERAL_EFUSE6, 247 /** PWM0 */ 248 PERIPHERAL_PWM0, 249 /** PWM1 */ 250 PERIPHERAL_PWM1, 251 /** PWM2 */ 252 PERIPHERAL_PWM2, 253 /** PWM3 */ 254 PERIPHERAL_PWM3, 255 /** PMU Sensor ADC */ 256 PERIPHERAL_ADC, 257 /** SPI0 SCK Phase Internal */ 258 PERIPHERAL_SPI0_SCK_PHASE, 259 /** SPI1 SCK Phase Internal */ 260 PERIPHERAL_SPI1_SCK_PHASE, 261 /** GPIO Controller */ 262 PERIPHERAL_GPIO_GCLK, 263 /** ARM Timer 0 Gated APB */ 264 PERIPHERAL_TIMER0_GATE, 265 /** SHA Core */ 266 PERIPHERAL_SHA_CORE, 267 /** SHA AHB */ 268 PERIPHERAL_SHA_AHB, 269 /** AES Core */ 270 PERIPHERAL_AES_CORE, 271 /** AES AHB */ 272 PERIPHERAL_AES_AHB, 273 /** IDRAM1_0 Memory */ 274 PERIPHERAL_IDRAM1_0, 275 /** IDRAM1_1 Memory */ 276 PERIPHERAL_IDRAM1_1, 277 /** IDRAM1_2 Memory */ 278 PERIPHERAL_IDRAM1_2, 279 /** IDRAM2_0 Memory */ 280 PERIPHERAL_IDRAM2_0, 281 /** IDRAM2_1 Memory */ 282 PERIPHERAL_IDRAM2_1, 283 284 /** BLE RXTX Sequencer */ 285 PERIPHERAL_BLE_RXTX, 286 /** BLE HAB */ 287 PERIPHERAL_BLE_AHB, 288 /** BLE Periph Regs */ 289 PERIPHERAL_BLE_PERIPH_REGS, 290 291 /** LPMCU CPU */ 292 PERIPHERAL_LPMCU_CPU, 293 /** SPI Flash Interface */ 294 PERIPHERAL_SPI_FLASH_IF, 295 /** SPI0 Interface */ 296 PERIPHERAL_SPI0_IF, 297 /** SPI1 Interface */ 298 PERIPHERAL_SPI1_IF, 299 /** I2C0 Interface */ 300 PERIPHERAL_I2C0_IF, 301 /** MBIST Logic */ 302 PERIPHERAL_MBIST, 303 /** Low Power Clock Calibration APB */ 304 PERIPHERAL_LOW_POWER_APB, 305 /** LPMCU Debug */ 306 PERIPHERAL_LPMCU_DEBUG, 307 /** Free Running ARM Clock */ 308 PERIPHERAL_ARM_FREE_CLK, 309 /** ARM APB */ 310 PERIPHERAL_ARM_APB, 311 /** I2C1 Interface */ 312 PERIPHERAL_I2C1_IF, 313 /** SPI0 SCK Clock */ 314 PERIPHERAL_SPI0_SCK_CLK, 315 /** SPI1 SCK Clock */ 316 PERIPHERAL_SPI1_SCK_CLK, 317 /** DMA Controller */ 318 PERIPHERAL_DMA, 319 320 PERIPHERAL_SLEEP_TIMER, 321 }; 322 323 /** 324 * \brief SYSTEM peripheral enum 325 * 326 * Enum for the possible peripheral for the system. 327 * 328 */ 329 enum system_peripheral_aon { 330 /** Sleep timer */ 331 PERIPHERAL_AON_SLEEP_TIMER, 332 /** Power sequencer */ 333 PERIPHERAL_AON_POWER_SEQUENCER, 334 /** PD0 */ 335 PERIPHERAL_AON_PD, 336 }; 337 338 /** 339 * \brief SYSTEM CLOCK frequency selection enum 340 * 341 * Enum for the possible frequency selection for the CLOCK. 342 * 343 */ 344 enum system_clock_freq { 345 /** 26MHz */ 346 CLOCK_FREQ_26_MHZ, 347 /** 13MHz */ 348 CLOCK_FREQ_13_MHZ, 349 /** 6.5MHz */ 350 CLOCK_FREQ_6_5_MHZ, 351 /** 3.25MHz */ 352 CLOCK_FREQ_3_25_MHZ, 353 }; 354 355 /** 356 * \brief SYSTEM CLOCK resource selection enum 357 * 358 * Enum for the possible resource selection for the CLOCK. 359 * 360 */ 361 enum system_clock_resource { 362 /** Use 26MHz Crystal Oscillator XO as ARM clock */ 363 CLOCK_RESOURCE_XO_26_MHZ, 364 /** Use either LP 2MHz clock */ 365 CLOCK_RESOURCE_LP_2_MHZ, 366 /** 26MHz integrated RC Oscillator */ 367 CLOCK_RESOURCE_RC_26_MHZ, 368 }; 369 370 /** 371 * \brief SYSTEM CLOCK AON resource selection enum 372 * 373 * Enum for the possible AON resource selection for the CLOCK. 374 * 375 */ 376 enum system_clock_aon_resource { 377 /** OSC 2MHz */ 378 CLOCK_AON_RESOURCE_2_MHZ, 379 /** OSC 2MHz/64 = 31.25KHz */ 380 CLOCK_AON_RESOURCE_31_25_KHZ, 381 /** RTC XO 32.768KHz */ 382 CLOCK_AON_RESOURCE_32_768_KHZ, 383 /** Use default clock */ 384 CLOCK_AON_DEFAULT, 385 }; 386 387 /** 388 * \brief Multiplier value for the number of calibration clocks enum 389 * 390 * Enum for the possible multiplier value for the number of calibration clocks 391 * 392 */ 393 enum system_calibration_clk_num { 394 /** 1 clock */ 395 CALIBRATION_CLK_NUM_1, 396 /** 2 clocks */ 397 CALIBRATION_CLK_NUM_2, 398 /** 4 clocks */ 399 CALIBRATION_CLK_NUM_4, 400 /** 8 clocks */ 401 CALIBRATION_CLK_NUM_8, 402 /** 16 clocks */ 403 CALIBRATION_CLK_NUM_16, 404 /** 32 clocks */ 405 CALIBRATION_CLK_NUM_32, 406 /** 64 clocks */ 407 CALIBRATION_CLK_NUM_64, 408 /** 128 clocks */ 409 CALIBRATION_CLK_NUM_128, 410 /** 256 clocks */ 411 CALIBRATION_CLK_NUM_256, 412 /** 512 clocks */ 413 CALIBRATION_CLK_NUM_512, 414 /** 1024 clocks */ 415 CALIBRATION_CLK_NUM_1024, 416 /** 2048 clocks */ 417 CALIBRATION_CLK_NUM_2048, 418 /** 4096 clocks */ 419 CALIBRATION_CLK_NUM_4096, 420 /** 8192 clocks */ 421 CALIBRATION_CLK_NUM_8192, 422 /** 16384 clocks */ 423 CALIBRATION_CLK_NUM_16384, 424 /** 32768 clocks */ 425 CALIBRATION_CLK_NUM_32768, 426 }; 427 428 /** 429 * \brief Interrupt control enum 430 * 431 * Enum for the possible interrupt control 432 * 433 */ 434 enum system_calibration_interrput_control { 435 /** IRQ when OSC calibration done */ 436 CALIBRATION_INTERRUPT_OSC_DONE, 437 /** IRQ when RTC calibration done */ 438 CALIBRATION_INTERRUPT_RTC_DONE, 439 /** IRQ when OSC or RTC calibration done */ 440 CALIBRATION_INTERRUPT_OSC_OR_RTC_DONE, 441 /** IRQ when OSC and RTC calibration done */ 442 CALIBRATION_INTERRUPT_OSC_AND_RTC_DONE, 443 }; 444 445 enum system_calibration_status { 446 /** No calibration in progress */ 447 CALBRATION_NO_IN_PROGRESS, 448 /** Calibration in progress */ 449 CALBRATION_IN_PROGRESS, 450 /** Calibration done */ 451 CALBRATION_DONE, 452 }; 453 454 struct system_calibration_config { 455 enum system_calibration_clk_num clk_num; 456 enum system_calibration_interrput_control interrupt_control; 457 uint16_t osc_fractional_part; 458 uint16_t osc_integer_part; 459 uint16_t rtc_fractional_part; 460 uint16_t rtc_integer_part; 461 }; 462 463 /** 464 * \name System clock config, enable and disable functions 465 * @{ 466 */ 467 enum status_code system_clock_config( \ 468 enum system_clock_resource resoure, \ 469 enum system_clock_freq freq); 470 uint32_t system_clock_get_value(void); 471 enum status_code system_clock_peripheral_enable(enum system_peripheral peripheral); 472 enum status_code system_clock_peripheral_disable(enum system_peripheral peripheral); 473 enum status_code system_clock_peripheral_freq_config( \ 474 enum system_peripheral peripheral, \ 475 enum system_clock_freq freq); 476 //void system_init(void); 477 /** @} */ 478 479 /** 480 * \name System and peripheral reset 481 * @{ 482 */ 483 void system_global_reset(void); 484 enum status_code system_peripheral_reset(enum system_peripheral peripheral); 485 /** @} */ 486 487 /** 488 * \name System ISR register and unregister 489 * @{ 490 */ 491 void system_register_isr(enum ram_isr_table_index isr_index, 492 uint32_t isr_address); 493 void system_unregister_isr(enum ram_isr_table_index isr_index); 494 /** @} */ 495 496 /** 497 * \name System clock OSC(32KHz) and RTC(32.768KHz) calibration 498 * @{ 499 */ 500 void system_calibration_get_config_defaults(struct system_calibration_config *config); 501 void system_calibration_set_config(struct system_calibration_config *config); 502 enum system_calibration_status system_calibration_get_interrupt_status( \ 503 struct system_calibration_config *config); 504 505 void system_osc_calibration_enable(void); 506 void system_osc_calibration_disable(void); 507 enum system_calibration_status system_osc_calibration_get_status(void); 508 void system_osc_calibration_clear_status(void); 509 void system_osc_calibration_result(struct system_calibration_config *config); 510 511 void system_rtc_calibration_enable(void); 512 void system_rtc_calibration_disable(void); 513 enum system_calibration_status system_rtc_calibration_get_status(void); 514 void system_rtc_calibration_clear_status(void); 515 void system_rtc_calibration_result(struct system_calibration_config *config); 516 /** @} */ 517 518 /** 519 * \name System clock aon config 520 * @{ 521 */ 522 enum status_code system_clock_aon_config( \ 523 enum system_peripheral_aon peripheral_aon, \ 524 enum system_clock_aon_resource aon_resource); 525 enum status_code system_clock_peripheral_aon_enable(enum system_peripheral_aon peripheral_aon); 526 enum status_code system_clock_peripheral_aon_disable(enum system_peripheral_aon peripheral_aon); 527 /** @} */ 528 529 #ifdef __cplusplus 530 } 531 #endif 532 533 /** 534 * @} 535 */ 536 537 /** 538 539 * \page asfdoc_samb_drivers_power_exqsg Examples for Power Driver 540 * 541 * This is a list of the available Quick Start Guides (QSGs) and example 542 * applications. QSGs are simple examples with step-by-step instructions to 543 * configure and use this driver in a selection of 544 * use cases. Note that a QSG can be compiled as a standalone application or be 545 * added to the user application. 546 * 547 * \page asfdoc_samb_system_extra Extra Information for SYSTEM Driver 548 * 549 * \section asfdoc_samb_system_extra_acronyms Acronyms 550 * Below is a table listing the acronyms used in this module, along with their 551 * intended meanings. 552 * 553 * <table> 554 * <tr> 555 * <th>Acronym</th> 556 * <th>Definition</th> 557 * </tr> 558 * <tr> 559 * <td>SYSCTRL</td> 560 * <td>System control interface</td> 561 * </tr> 562 * </table> 563 * 564 * 565 * \section asfdoc_samb_system_extra_dependencies Dependencies 566 * This driver has the following dependencies: 567 * 568 * - None 569 * 570 * 571 * \section asfdoc_samb_system_extra_errata Errata 572 * There are no errata related to this driver. 573 * 574 * 575 * \section asfdoc_samb_system_extra_history Module History 576 * An overview of the module history is presented in the table below, with 577 * details on the enhancements and fixes made to the module since its first 578 * release. The current version of this corresponds to the newest version in 579 * the table. 580 * 581 * <table> 582 * <tr> 583 * <th>Changelog</th> 584 * </tr> 585 * <tr> 586 * <td>Initial Release</td> 587 * </tr> 588 * </table> 589 * 590 * \page asfdoc_samb_system_document_revision_history Document Revision History 591 * 592 * <table> 593 * <tr> 594 * <th>Doc. Rev.</td> 595 * <th>Date</td> 596 * <th>Comments</td> 597 * </tr> 598 * <tr> 599 * <td>A</td> 600 * <td>08/2015</td> 601 * <td>Initial document release</td> 602 * </tr> 603 * \endif 604 * </table> 605 */ 606 607 #endif /* SYSTEM_H_INCLUDED */ 608 609