1 /** 2 * \file 3 * 4 * \brief Component description for AC 5 * 6 * Copyright (c) 2015 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 /* 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45 */ 46 47 #ifndef _SAMD20_AC_COMPONENT_ 48 #define _SAMD20_AC_COMPONENT_ 49 50 /* ========================================================================== */ 51 /** SOFTWARE API DEFINITION FOR AC */ 52 /* ========================================================================== */ 53 /** \addtogroup SAMD20_AC Analog Comparators */ 54 /*@{*/ 55 56 #define AC_U2205 57 #define REV_AC 0x111 58 59 /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ 60 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 61 typedef union { 62 struct { 63 uint8_t SWRST:1; /*!< bit: 0 Software Reset */ 64 uint8_t ENABLE:1; /*!< bit: 1 Enable */ 65 uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */ 66 uint8_t :4; /*!< bit: 3.. 6 Reserved */ 67 uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */ 68 } bit; /*!< Structure used for bit access */ 69 uint8_t reg; /*!< Type used for register access */ 70 } AC_CTRLA_Type; 71 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 72 73 #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */ 74 #define AC_CTRLA_RESETVALUE 0x00ul /**< \brief (AC_CTRLA reset_value) Control A */ 75 76 #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */ 77 #define AC_CTRLA_SWRST (0x1ul << AC_CTRLA_SWRST_Pos) 78 #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */ 79 #define AC_CTRLA_ENABLE (0x1ul << AC_CTRLA_ENABLE_Pos) 80 #define AC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (AC_CTRLA) Run in Standby */ 81 #define AC_CTRLA_RUNSTDBY_Msk (0x1ul << AC_CTRLA_RUNSTDBY_Pos) 82 #define AC_CTRLA_RUNSTDBY(value) ((AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos))) 83 #define AC_CTRLA_LPMUX_Pos 7 /**< \brief (AC_CTRLA) Low-Power Mux */ 84 #define AC_CTRLA_LPMUX (0x1ul << AC_CTRLA_LPMUX_Pos) 85 #define AC_CTRLA_MASK 0x87ul /**< \brief (AC_CTRLA) MASK Register */ 86 87 /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ 88 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 89 typedef union { 90 struct { 91 uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */ 92 uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */ 93 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 94 } bit; /*!< Structure used for bit access */ 95 struct { 96 uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */ 97 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 98 } vec; /*!< Structure used for vec access */ 99 uint8_t reg; /*!< Type used for register access */ 100 } AC_CTRLB_Type; 101 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 102 103 #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */ 104 #define AC_CTRLB_RESETVALUE 0x00ul /**< \brief (AC_CTRLB reset_value) Control B */ 105 106 #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */ 107 #define AC_CTRLB_START0 (1 << AC_CTRLB_START0_Pos) 108 #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */ 109 #define AC_CTRLB_START1 (1 << AC_CTRLB_START1_Pos) 110 #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */ 111 #define AC_CTRLB_START_Msk (0x3ul << AC_CTRLB_START_Pos) 112 #define AC_CTRLB_START(value) ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos))) 113 #define AC_CTRLB_MASK 0x03ul /**< \brief (AC_CTRLB) MASK Register */ 114 115 /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ 116 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 117 typedef union { 118 struct { 119 uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */ 120 uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */ 121 uint16_t :2; /*!< bit: 2.. 3 Reserved */ 122 uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */ 123 uint16_t :3; /*!< bit: 5.. 7 Reserved */ 124 uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input */ 125 uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input */ 126 uint16_t :6; /*!< bit: 10..15 Reserved */ 127 } bit; /*!< Structure used for bit access */ 128 struct { 129 uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */ 130 uint16_t :2; /*!< bit: 2.. 3 Reserved */ 131 uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */ 132 uint16_t :3; /*!< bit: 5.. 7 Reserved */ 133 uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input */ 134 uint16_t :6; /*!< bit: 10..15 Reserved */ 135 } vec; /*!< Structure used for vec access */ 136 uint16_t reg; /*!< Type used for register access */ 137 } AC_EVCTRL_Type; 138 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 139 140 #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */ 141 #define AC_EVCTRL_RESETVALUE 0x0000ul /**< \brief (AC_EVCTRL reset_value) Event Control */ 142 143 #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */ 144 #define AC_EVCTRL_COMPEO0 (1 << AC_EVCTRL_COMPEO0_Pos) 145 #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */ 146 #define AC_EVCTRL_COMPEO1 (1 << AC_EVCTRL_COMPEO1_Pos) 147 #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */ 148 #define AC_EVCTRL_COMPEO_Msk (0x3ul << AC_EVCTRL_COMPEO_Pos) 149 #define AC_EVCTRL_COMPEO(value) ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos))) 150 #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */ 151 #define AC_EVCTRL_WINEO0 (1 << AC_EVCTRL_WINEO0_Pos) 152 #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */ 153 #define AC_EVCTRL_WINEO_Msk (0x1ul << AC_EVCTRL_WINEO_Pos) 154 #define AC_EVCTRL_WINEO(value) ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos))) 155 #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input */ 156 #define AC_EVCTRL_COMPEI0 (1 << AC_EVCTRL_COMPEI0_Pos) 157 #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input */ 158 #define AC_EVCTRL_COMPEI1 (1 << AC_EVCTRL_COMPEI1_Pos) 159 #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input */ 160 #define AC_EVCTRL_COMPEI_Msk (0x3ul << AC_EVCTRL_COMPEI_Pos) 161 #define AC_EVCTRL_COMPEI(value) ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos))) 162 #define AC_EVCTRL_MASK 0x0313ul /**< \brief (AC_EVCTRL) MASK Register */ 163 164 /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ 165 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 166 typedef union { 167 struct { 168 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ 169 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ 170 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 171 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ 172 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 173 } bit; /*!< Structure used for bit access */ 174 struct { 175 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ 176 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 177 uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ 178 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 179 } vec; /*!< Structure used for vec access */ 180 uint8_t reg; /*!< Type used for register access */ 181 } AC_INTENCLR_Type; 182 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 183 184 #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */ 185 #define AC_INTENCLR_RESETVALUE 0x00ul /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */ 186 187 #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */ 188 #define AC_INTENCLR_COMP0 (1 << AC_INTENCLR_COMP0_Pos) 189 #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */ 190 #define AC_INTENCLR_COMP1 (1 << AC_INTENCLR_COMP1_Pos) 191 #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */ 192 #define AC_INTENCLR_COMP_Msk (0x3ul << AC_INTENCLR_COMP_Pos) 193 #define AC_INTENCLR_COMP(value) ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos))) 194 #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */ 195 #define AC_INTENCLR_WIN0 (1 << AC_INTENCLR_WIN0_Pos) 196 #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */ 197 #define AC_INTENCLR_WIN_Msk (0x1ul << AC_INTENCLR_WIN_Pos) 198 #define AC_INTENCLR_WIN(value) ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos))) 199 #define AC_INTENCLR_MASK 0x13ul /**< \brief (AC_INTENCLR) MASK Register */ 200 201 /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ 202 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 203 typedef union { 204 struct { 205 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ 206 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ 207 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 208 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ 209 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 210 } bit; /*!< Structure used for bit access */ 211 struct { 212 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ 213 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 214 uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ 215 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 216 } vec; /*!< Structure used for vec access */ 217 uint8_t reg; /*!< Type used for register access */ 218 } AC_INTENSET_Type; 219 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 220 221 #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */ 222 #define AC_INTENSET_RESETVALUE 0x00ul /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */ 223 224 #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */ 225 #define AC_INTENSET_COMP0 (1 << AC_INTENSET_COMP0_Pos) 226 #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */ 227 #define AC_INTENSET_COMP1 (1 << AC_INTENSET_COMP1_Pos) 228 #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */ 229 #define AC_INTENSET_COMP_Msk (0x3ul << AC_INTENSET_COMP_Pos) 230 #define AC_INTENSET_COMP(value) ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos))) 231 #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */ 232 #define AC_INTENSET_WIN0 (1 << AC_INTENSET_WIN0_Pos) 233 #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */ 234 #define AC_INTENSET_WIN_Msk (0x1ul << AC_INTENSET_WIN_Pos) 235 #define AC_INTENSET_WIN(value) ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos))) 236 #define AC_INTENSET_MASK 0x13ul /**< \brief (AC_INTENSET) MASK Register */ 237 238 /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ 239 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 240 typedef union { 241 struct { 242 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */ 243 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */ 244 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 245 uint8_t WIN0:1; /*!< bit: 4 Window 0 */ 246 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 247 } bit; /*!< Structure used for bit access */ 248 struct { 249 uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */ 250 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 251 uint8_t WIN:1; /*!< bit: 4 Window x */ 252 uint8_t :3; /*!< bit: 5.. 7 Reserved */ 253 } vec; /*!< Structure used for vec access */ 254 uint8_t reg; /*!< Type used for register access */ 255 } AC_INTFLAG_Type; 256 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 257 258 #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */ 259 #define AC_INTFLAG_RESETVALUE 0x00ul /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */ 260 261 #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */ 262 #define AC_INTFLAG_COMP0 (1 << AC_INTFLAG_COMP0_Pos) 263 #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */ 264 #define AC_INTFLAG_COMP1 (1 << AC_INTFLAG_COMP1_Pos) 265 #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */ 266 #define AC_INTFLAG_COMP_Msk (0x3ul << AC_INTFLAG_COMP_Pos) 267 #define AC_INTFLAG_COMP(value) ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos))) 268 #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */ 269 #define AC_INTFLAG_WIN0 (1 << AC_INTFLAG_WIN0_Pos) 270 #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */ 271 #define AC_INTFLAG_WIN_Msk (0x1ul << AC_INTFLAG_WIN_Pos) 272 #define AC_INTFLAG_WIN(value) ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos))) 273 #define AC_INTFLAG_MASK 0x13ul /**< \brief (AC_INTFLAG) MASK Register */ 274 275 /* -------- AC_STATUSA : (AC Offset: 0x08) (R/ 8) Status A -------- */ 276 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 277 typedef union { 278 struct { 279 uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ 280 uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ 281 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 282 uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ 283 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 284 } bit; /*!< Structure used for bit access */ 285 struct { 286 uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ 287 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 288 } vec; /*!< Structure used for vec access */ 289 uint8_t reg; /*!< Type used for register access */ 290 } AC_STATUSA_Type; 291 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 292 293 #define AC_STATUSA_OFFSET 0x08 /**< \brief (AC_STATUSA offset) Status A */ 294 #define AC_STATUSA_RESETVALUE 0x00ul /**< \brief (AC_STATUSA reset_value) Status A */ 295 296 #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */ 297 #define AC_STATUSA_STATE0 (1 << AC_STATUSA_STATE0_Pos) 298 #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */ 299 #define AC_STATUSA_STATE1 (1 << AC_STATUSA_STATE1_Pos) 300 #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */ 301 #define AC_STATUSA_STATE_Msk (0x3ul << AC_STATUSA_STATE_Pos) 302 #define AC_STATUSA_STATE(value) ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos))) 303 #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */ 304 #define AC_STATUSA_WSTATE0_Msk (0x3ul << AC_STATUSA_WSTATE0_Pos) 305 #define AC_STATUSA_WSTATE0(value) ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos))) 306 #define AC_STATUSA_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSA) Signal is above window */ 307 #define AC_STATUSA_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSA) Signal is inside window */ 308 #define AC_STATUSA_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSA) Signal is below window */ 309 #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) 310 #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) 311 #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) 312 #define AC_STATUSA_MASK 0x33ul /**< \brief (AC_STATUSA) MASK Register */ 313 314 /* -------- AC_STATUSB : (AC Offset: 0x09) (R/ 8) Status B -------- */ 315 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 316 typedef union { 317 struct { 318 uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */ 319 uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */ 320 uint8_t :5; /*!< bit: 2.. 6 Reserved */ 321 uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy */ 322 } bit; /*!< Structure used for bit access */ 323 struct { 324 uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */ 325 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 326 } vec; /*!< Structure used for vec access */ 327 uint8_t reg; /*!< Type used for register access */ 328 } AC_STATUSB_Type; 329 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 330 331 #define AC_STATUSB_OFFSET 0x09 /**< \brief (AC_STATUSB offset) Status B */ 332 #define AC_STATUSB_RESETVALUE 0x00ul /**< \brief (AC_STATUSB reset_value) Status B */ 333 334 #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */ 335 #define AC_STATUSB_READY0 (1 << AC_STATUSB_READY0_Pos) 336 #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */ 337 #define AC_STATUSB_READY1 (1 << AC_STATUSB_READY1_Pos) 338 #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */ 339 #define AC_STATUSB_READY_Msk (0x3ul << AC_STATUSB_READY_Pos) 340 #define AC_STATUSB_READY(value) ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos))) 341 #define AC_STATUSB_SYNCBUSY_Pos 7 /**< \brief (AC_STATUSB) Synchronization Busy */ 342 #define AC_STATUSB_SYNCBUSY (0x1ul << AC_STATUSB_SYNCBUSY_Pos) 343 #define AC_STATUSB_MASK 0x83ul /**< \brief (AC_STATUSB) MASK Register */ 344 345 /* -------- AC_STATUSC : (AC Offset: 0x0A) (R/ 8) Status C -------- */ 346 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 347 typedef union { 348 struct { 349 uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ 350 uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ 351 uint8_t :2; /*!< bit: 2.. 3 Reserved */ 352 uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ 353 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 354 } bit; /*!< Structure used for bit access */ 355 struct { 356 uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ 357 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 358 } vec; /*!< Structure used for vec access */ 359 uint8_t reg; /*!< Type used for register access */ 360 } AC_STATUSC_Type; 361 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 362 363 #define AC_STATUSC_OFFSET 0x0A /**< \brief (AC_STATUSC offset) Status C */ 364 #define AC_STATUSC_RESETVALUE 0x00ul /**< \brief (AC_STATUSC reset_value) Status C */ 365 366 #define AC_STATUSC_STATE0_Pos 0 /**< \brief (AC_STATUSC) Comparator 0 Current State */ 367 #define AC_STATUSC_STATE0 (1 << AC_STATUSC_STATE0_Pos) 368 #define AC_STATUSC_STATE1_Pos 1 /**< \brief (AC_STATUSC) Comparator 1 Current State */ 369 #define AC_STATUSC_STATE1 (1 << AC_STATUSC_STATE1_Pos) 370 #define AC_STATUSC_STATE_Pos 0 /**< \brief (AC_STATUSC) Comparator x Current State */ 371 #define AC_STATUSC_STATE_Msk (0x3ul << AC_STATUSC_STATE_Pos) 372 #define AC_STATUSC_STATE(value) ((AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos))) 373 #define AC_STATUSC_WSTATE0_Pos 4 /**< \brief (AC_STATUSC) Window 0 Current State */ 374 #define AC_STATUSC_WSTATE0_Msk (0x3ul << AC_STATUSC_WSTATE0_Pos) 375 #define AC_STATUSC_WSTATE0(value) ((AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos))) 376 #define AC_STATUSC_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSC) Signal is above window */ 377 #define AC_STATUSC_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSC) Signal is inside window */ 378 #define AC_STATUSC_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSC) Signal is below window */ 379 #define AC_STATUSC_WSTATE0_ABOVE (AC_STATUSC_WSTATE0_ABOVE_Val << AC_STATUSC_WSTATE0_Pos) 380 #define AC_STATUSC_WSTATE0_INSIDE (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos) 381 #define AC_STATUSC_WSTATE0_BELOW (AC_STATUSC_WSTATE0_BELOW_Val << AC_STATUSC_WSTATE0_Pos) 382 #define AC_STATUSC_MASK 0x33ul /**< \brief (AC_STATUSC) MASK Register */ 383 384 /* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W 8) Window Control -------- */ 385 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 386 typedef union { 387 struct { 388 uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */ 389 uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */ 390 uint8_t :5; /*!< bit: 3.. 7 Reserved */ 391 } bit; /*!< Structure used for bit access */ 392 uint8_t reg; /*!< Type used for register access */ 393 } AC_WINCTRL_Type; 394 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 395 396 #define AC_WINCTRL_OFFSET 0x0C /**< \brief (AC_WINCTRL offset) Window Control */ 397 #define AC_WINCTRL_RESETVALUE 0x00ul /**< \brief (AC_WINCTRL reset_value) Window Control */ 398 399 #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */ 400 #define AC_WINCTRL_WEN0 (0x1ul << AC_WINCTRL_WEN0_Pos) 401 #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */ 402 #define AC_WINCTRL_WINTSEL0_Msk (0x3ul << AC_WINCTRL_WINTSEL0_Pos) 403 #define AC_WINCTRL_WINTSEL0(value) ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos))) 404 #define AC_WINCTRL_WINTSEL0_ABOVE_Val 0x0ul /**< \brief (AC_WINCTRL) Interrupt on signal above window */ 405 #define AC_WINCTRL_WINTSEL0_INSIDE_Val 0x1ul /**< \brief (AC_WINCTRL) Interrupt on signal inside window */ 406 #define AC_WINCTRL_WINTSEL0_BELOW_Val 0x2ul /**< \brief (AC_WINCTRL) Interrupt on signal below window */ 407 #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3ul /**< \brief (AC_WINCTRL) Interrupt on signal outside window */ 408 #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) 409 #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) 410 #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) 411 #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) 412 #define AC_WINCTRL_MASK 0x07ul /**< \brief (AC_WINCTRL) MASK Register */ 413 414 /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ 415 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 416 typedef union { 417 struct { 418 uint32_t ENABLE:1; /*!< bit: 0 Enable */ 419 uint32_t SINGLE:1; /*!< bit: 1 Single-Shot Mode */ 420 uint32_t SPEED:2; /*!< bit: 2.. 3 Speed Selection */ 421 uint32_t :1; /*!< bit: 4 Reserved */ 422 uint32_t INTSEL:2; /*!< bit: 5.. 6 Interrupt Selection */ 423 uint32_t :1; /*!< bit: 7 Reserved */ 424 uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */ 425 uint32_t :1; /*!< bit: 11 Reserved */ 426 uint32_t MUXPOS:2; /*!< bit: 12..13 Positive Input Mux Selection */ 427 uint32_t :1; /*!< bit: 14 Reserved */ 428 uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */ 429 uint32_t OUT:2; /*!< bit: 16..17 Output */ 430 uint32_t :1; /*!< bit: 18 Reserved */ 431 uint32_t HYST:1; /*!< bit: 19 Hysteresis Enable */ 432 uint32_t :4; /*!< bit: 20..23 Reserved */ 433 uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */ 434 uint32_t :5; /*!< bit: 27..31 Reserved */ 435 } bit; /*!< Structure used for bit access */ 436 uint32_t reg; /*!< Type used for register access */ 437 } AC_COMPCTRL_Type; 438 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 439 440 #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */ 441 #define AC_COMPCTRL_RESETVALUE 0x00000000ul /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */ 442 443 #define AC_COMPCTRL_ENABLE_Pos 0 /**< \brief (AC_COMPCTRL) Enable */ 444 #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos) 445 #define AC_COMPCTRL_SINGLE_Pos 1 /**< \brief (AC_COMPCTRL) Single-Shot Mode */ 446 #define AC_COMPCTRL_SINGLE (0x1ul << AC_COMPCTRL_SINGLE_Pos) 447 #define AC_COMPCTRL_SPEED_Pos 2 /**< \brief (AC_COMPCTRL) Speed Selection */ 448 #define AC_COMPCTRL_SPEED_Msk (0x3ul << AC_COMPCTRL_SPEED_Pos) 449 #define AC_COMPCTRL_SPEED(value) ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos))) 450 #define AC_COMPCTRL_SPEED_LOW_Val 0x0ul /**< \brief (AC_COMPCTRL) Low speed */ 451 #define AC_COMPCTRL_SPEED_HIGH_Val 0x1ul /**< \brief (AC_COMPCTRL) High speed */ 452 #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) 453 #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) 454 #define AC_COMPCTRL_INTSEL_Pos 5 /**< \brief (AC_COMPCTRL) Interrupt Selection */ 455 #define AC_COMPCTRL_INTSEL_Msk (0x3ul << AC_COMPCTRL_INTSEL_Pos) 456 #define AC_COMPCTRL_INTSEL(value) ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos))) 457 #define AC_COMPCTRL_INTSEL_TOGGLE_Val 0x0ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */ 458 #define AC_COMPCTRL_INTSEL_RISING_Val 0x1ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */ 459 #define AC_COMPCTRL_INTSEL_FALLING_Val 0x2ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */ 460 #define AC_COMPCTRL_INTSEL_EOC_Val 0x3ul /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */ 461 #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) 462 #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) 463 #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) 464 #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) 465 #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */ 466 #define AC_COMPCTRL_MUXNEG_Msk (0x7ul << AC_COMPCTRL_MUXNEG_Pos) 467 #define AC_COMPCTRL_MUXNEG(value) ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos))) 468 #define AC_COMPCTRL_MUXNEG_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ 469 #define AC_COMPCTRL_MUXNEG_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ 470 #define AC_COMPCTRL_MUXNEG_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ 471 #define AC_COMPCTRL_MUXNEG_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ 472 #define AC_COMPCTRL_MUXNEG_GND_Val 0x4ul /**< \brief (AC_COMPCTRL) Ground */ 473 #define AC_COMPCTRL_MUXNEG_VSCALE_Val 0x5ul /**< \brief (AC_COMPCTRL) VDD scaler */ 474 #define AC_COMPCTRL_MUXNEG_BANDGAP_Val 0x6ul /**< \brief (AC_COMPCTRL) Internal bandgap voltage */ 475 #define AC_COMPCTRL_MUXNEG_DAC_Val 0x7ul /**< \brief (AC_COMPCTRL) DAC output */ 476 #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) 477 #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) 478 #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) 479 #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) 480 #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos) 481 #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) 482 #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) 483 #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos) 484 #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */ 485 #define AC_COMPCTRL_MUXPOS_Msk (0x3ul << AC_COMPCTRL_MUXPOS_Pos) 486 #define AC_COMPCTRL_MUXPOS(value) ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos))) 487 #define AC_COMPCTRL_MUXPOS_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */ 488 #define AC_COMPCTRL_MUXPOS_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */ 489 #define AC_COMPCTRL_MUXPOS_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */ 490 #define AC_COMPCTRL_MUXPOS_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */ 491 #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) 492 #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) 493 #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) 494 #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) 495 #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */ 496 #define AC_COMPCTRL_SWAP (0x1ul << AC_COMPCTRL_SWAP_Pos) 497 #define AC_COMPCTRL_OUT_Pos 16 /**< \brief (AC_COMPCTRL) Output */ 498 #define AC_COMPCTRL_OUT_Msk (0x3ul << AC_COMPCTRL_OUT_Pos) 499 #define AC_COMPCTRL_OUT(value) ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos))) 500 #define AC_COMPCTRL_OUT_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */ 501 #define AC_COMPCTRL_OUT_ASYNC_Val 0x1ul /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */ 502 #define AC_COMPCTRL_OUT_SYNC_Val 0x2ul /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */ 503 #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) 504 #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) 505 #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) 506 #define AC_COMPCTRL_HYST_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */ 507 #define AC_COMPCTRL_HYST (0x1ul << AC_COMPCTRL_HYST_Pos) 508 #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */ 509 #define AC_COMPCTRL_FLEN_Msk (0x7ul << AC_COMPCTRL_FLEN_Pos) 510 #define AC_COMPCTRL_FLEN(value) ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos))) 511 #define AC_COMPCTRL_FLEN_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) No filtering */ 512 #define AC_COMPCTRL_FLEN_MAJ3_Val 0x1ul /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */ 513 #define AC_COMPCTRL_FLEN_MAJ5_Val 0x2ul /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */ 514 #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) 515 #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) 516 #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) 517 #define AC_COMPCTRL_MASK 0x070BB76Ful /**< \brief (AC_COMPCTRL) MASK Register */ 518 519 /* -------- AC_SCALER : (AC Offset: 0x20) (R/W 8) Scaler n -------- */ 520 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 521 typedef union { 522 struct { 523 uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */ 524 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 525 } bit; /*!< Structure used for bit access */ 526 uint8_t reg; /*!< Type used for register access */ 527 } AC_SCALER_Type; 528 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 529 530 #define AC_SCALER_OFFSET 0x20 /**< \brief (AC_SCALER offset) Scaler n */ 531 #define AC_SCALER_RESETVALUE 0x00ul /**< \brief (AC_SCALER reset_value) Scaler n */ 532 533 #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */ 534 #define AC_SCALER_VALUE_Msk (0x3Ful << AC_SCALER_VALUE_Pos) 535 #define AC_SCALER_VALUE(value) ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos))) 536 #define AC_SCALER_MASK 0x3Ful /**< \brief (AC_SCALER) MASK Register */ 537 538 /** \brief AC hardware registers */ 539 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 540 typedef struct { 541 __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ 542 __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */ 543 __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */ 544 __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */ 545 __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */ 546 __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ 547 RoReg8 Reserved1[0x1]; 548 __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x08 (R/ 8) Status A */ 549 __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x09 (R/ 8) Status B */ 550 __I AC_STATUSC_Type STATUSC; /**< \brief Offset: 0x0A (R/ 8) Status C */ 551 RoReg8 Reserved2[0x1]; 552 __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0C (R/W 8) Window Control */ 553 RoReg8 Reserved3[0x3]; 554 __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */ 555 RoReg8 Reserved4[0x8]; 556 __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x20 (R/W 8) Scaler n */ 557 } Ac; 558 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 559 560 /*@}*/ 561 562 #endif /* _SAMD20_AC_COMPONENT_ */ 563