1 /** 2 * \file 3 * 4 * \brief Instance description for GCLK 5 * 6 * Copyright (c) 2016 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 44 #ifndef _SAMD21_GCLK_INSTANCE_ 45 #define _SAMD21_GCLK_INSTANCE_ 46 47 /* ========== Register definition for GCLK peripheral ========== */ 48 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 49 #define REG_GCLK_CTRL (0x40000C00U) /**< \brief (GCLK) Control */ 50 #define REG_GCLK_STATUS (0x40000C01U) /**< \brief (GCLK) Status */ 51 #define REG_GCLK_CLKCTRL (0x40000C02U) /**< \brief (GCLK) Generic Clock Control */ 52 #define REG_GCLK_GENCTRL (0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */ 53 #define REG_GCLK_GENDIV (0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */ 54 #else 55 #define REG_GCLK_CTRL (*(RwReg8 *)0x40000C00U) /**< \brief (GCLK) Control */ 56 #define REG_GCLK_STATUS (*(RoReg8 *)0x40000C01U) /**< \brief (GCLK) Status */ 57 #define REG_GCLK_CLKCTRL (*(RwReg16*)0x40000C02U) /**< \brief (GCLK) Generic Clock Control */ 58 #define REG_GCLK_GENCTRL (*(RwReg *)0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */ 59 #define REG_GCLK_GENDIV (*(RwReg *)0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */ 60 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 61 62 /* ========== Instance parameters for GCLK peripheral ========== */ 63 #define GCLK_GENDIV_BITS 16 64 #define GCLK_GEN_NUM 9 // Number of Generic Clock Generators 65 #define GCLK_GEN_NUM_MSB 8 // Number of Generic Clock Generators - 1 66 #define GCLK_GEN_SOURCE_NUM_MSB 8 // Number of Generic Clock Sources - 1 67 #define GCLK_NUM 37 // Number of Generic Clock Users 68 #define GCLK_SOURCE_DFLL48M 7 // DFLL48M output 69 #define GCLK_SOURCE_FDPLL 8 // FDPLL output 70 #define GCLK_SOURCE_GCLKGEN1 2 // Generic clock generator 1 output 71 #define GCLK_SOURCE_GCLKIN 1 // Generator input pad 72 #define GCLK_SOURCE_NUM 9 // Number of Generic Clock Sources 73 #define GCLK_SOURCE_OSCULP32K 3 // OSCULP32K oscillator output 74 #define GCLK_SOURCE_OSC8M 6 // OSC8M oscillator output 75 #define GCLK_SOURCE_OSC32K 4 // OSC32K oscillator outpur 76 #define GCLK_SOURCE_XOSC 0 // XOSC oscillator output 77 #define GCLK_SOURCE_XOSC32K 5 // XOSC32K oscillator output 78 79 #endif /* _SAMD21_GCLK_INSTANCE_ */ 80