1 /******************************************************************************* 2 * (c) Copyright 2011-2013 Microsemi SoC Products Group. All rights reserved. 3 * 4 * Register bit offsets and masks defintions for SmartFusion2 MSS MMUART. 5 * 6 * SVN $Revision: 5610 $ 7 * SVN $Date: 2013-04-05 18:49:30 +0530 (Fri, 05 Apr 2013) $ 8 */ 9 #ifndef MSS_UART_REGS_H_ 10 #define MSS_UART_REGS_H_ 11 12 #ifdef __cplusplus 13 extern "C" { 14 #endif 15 16 /******************************************************************************* 17 Register Bit definitions 18 */ 19 20 /* Line Control register bit definitions */ 21 #define SB 6u /* Set break */ 22 #define DLAB 7u /* Divisor latch access bit */ 23 24 /* FIFO Control register bit definitions */ 25 #define RXRDY_TXRDYN_EN 0u /* Enable TXRDY and RXRDY signals */ 26 #define CLEAR_RX_FIFO 1u /* Clear receiver FIFO */ 27 #define CLEAR_TX_FIFO 2u /* Clear transimtter FIFO */ 28 #define RDYMODE 3u /* Mode 0 or Mode 1 for TXRDY and RXRDY */ 29 30 /* Modem Control register bit definitions */ 31 #define LOOP 4u /* Local loopback */ 32 #define RLOOP 5u /* Remote loopback */ 33 #define ECHO 6u /* Automatic echo */ 34 #define RLOOP_MASK 0x6u /* Remote loopback & Automatic echo*/ 35 36 /* Line Status register bit definitions */ 37 #define DR 0u /* Data ready */ 38 #define THRE 5u /* Transmitter holding register empty */ 39 #define TEMT 6u /* Transitter empty */ 40 41 /* Interrupt Enable register bit definitions */ 42 #define ERBFI 0u /* Enable receiver buffer full interrupt */ 43 #define ETBEI 1u /* Enable transmitter buffer empty interrupt */ 44 #define ELSI 2u /* Enable line status interrupt */ 45 #define EDSSI 3u /* Enable modem status interrupt */ 46 47 /* Multimode register 0 bit definitions */ 48 #define ELIN 3u /* Enable LIN header detection */ 49 #define ETTG 5u /* Enable transmitter time guard */ 50 #define ERTO 6u /* Enable receiver time-out */ 51 #define EFBR 7u /* Enable fractional baud rate mode */ 52 53 /* Multimode register 1 bit definitions */ 54 #define E_MSB_RX 0u /* MSB / LSB first for receiver */ 55 #define E_MSB_TX 1u /* MSB / LSB first for transmitter */ 56 #define EIRD 2u /* Enable IrDA modem */ 57 #define EIRX 3u /* Input polarity for IrDA modem */ 58 #define EITX 4u /* Output polarity for IrDA modem */ 59 #define EITP 5u /* Output pulse width for IrDA modem */ 60 61 /* Multimode register 2 bit definitions */ 62 #define EERR 0u /* Enable ERR / NACK during stop time */ 63 #define EAFM 1u /* Enable 9-bit address flag mode */ 64 #define EAFC 2u /* Enable address flag clear */ 65 #define ESWM 3u /* Enable single wire half-duplex mode */ 66 67 /* Multimode Interrupt Enable register and 68 Multimode Interrupt Identification register definitions */ 69 #define ERTOI 0u /* Enable receiver timeout interrupt */ 70 #define ENACKI 1u /* Enable NACK / ERR interrupt */ 71 #define EPID_PEI 2u /* Enable PID parity error interrupt */ 72 #define ELINBI 3u /* Enable LIN break interrupt */ 73 #define ELINSI 4u /* Enable LIN sync detection interrupt */ 74 75 76 #ifdef __cplusplus 77 } 78 #endif 79 80 #endif /* MSS_UART_REGS_H_ */ 81 82 83 84