1 /******************************************************************************* 2 * (c) Copyright 2012 Microsemi SoC Products Group. All rights reserved. 3 * 4 * Smartfusion2 system configuration. This file is automatically generated 5 * by the Libero tools. 6 * 7 */ 8 #ifndef MSS_SYSTEM_CONFIGURATION 9 #define MSS_SYSTEM_CONFIGURATION 10 11 /*============================================================================== 12 * Clock configuration 13 */ 14 #include "sys_config_mss_clocks.h" 15 16 /*============================================================================== 17 * Memory remapping configuration 18 */ 19 /* TBD */ 20 21 /*============================================================================== 22 * FACC_INIT (Cortex-M3 runs the FACC INIT procedure) 23 * Only set to 1 for design targeting the M2S050T_ES device 24 */ 25 #define MSS_SYS_FACC_INIT_BY_CORTEX 0 26 27 /*============================================================================== 28 * MDDR configuration 29 */ 30 #define MSS_SYS_MDDR_CONFIG_BY_CORTEX 0 31 32 /*============================================================================== 33 * FDDR configuration 34 */ 35 #define MSS_SYS_FDDR_CONFIG_BY_CORTEX 0 36 37 /*============================================================================== 38 * SERDES Interface configuration 39 */ 40 #define MSS_SYS_SERDES_0_CONFIG_BY_CORTEX 0 41 #if MSS_SYS_SERDES_0_CONFIG_BY_CORTEX 42 #include "sys_config_SERDESIF_0.h" 43 #endif 44 45 #define MSS_SYS_SERDES_1_CONFIG_BY_CORTEX 0 46 #if MSS_SYS_SERDES_1_CONFIG_BY_CORTEX 47 #include "sys_config_SERDESIF_1.h" 48 #endif 49 50 #define MSS_SYS_SERDES_2_CONFIG_BY_CORTEX 0 51 #if MSS_SYS_SERDES_2_CONFIG_BY_CORTEX 52 #include "sys_config_SERDESIF_2.h" 53 #endif 54 55 #define MSS_SYS_SERDES_3_CONFIG_BY_CORTEX 0 56 #if MSS_SYS_SERDES_3_CONFIG_BY_CORTEX 57 #include "sys_config_SERDESIF_3.h" 58 #endif 59 60 /*============================================================================== 61 * Cache configuration 62 */ 63 #define MSS_SYS_CACHE_CONFIG_BY_CORTEX 0 64 65 #endif /* MSS_SYSTEM_CONFIGURATION */ 66 67