1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2020-06-20 thread-liu first version 9 */ 10 11 #ifndef __DMA_CONFIG_H__ 12 #define __DMA_CONFIG_H__ 13 14 #include <rtthread.h> 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 /* DMA1 stream0 */ 21 22 /* DMA1 stream1 */ 23 24 /* DMA1 stream2 */ 25 26 /* DMA1 stream3 */ 27 28 /* DMA1 stream4 */ 29 30 /* DMA1 stream5 */ 31 32 /* DMA1 stream6 */ 33 34 /* DMA1 stream7 */ 35 36 /* DMA2 stream0 */ 37 #if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) 38 #define UART3_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler 39 #define UART3_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 40 #define UART3_RX_DMA_INSTANCE DMA2_Stream0 41 #define UART3_RX_DMA_CHANNEL DMA_REQUEST_USART3_RX 42 #define UART3_RX_DMA_IRQ DMA2_Stream0_IRQn 43 #elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE) 44 #define SPI5_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler 45 #define SPI5_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 46 #define SPI5_RX_DMA_INSTANCE DMA2_Stream0 47 #define SPI5_RX_DMA_CHANNEL DMA_REQUEST_SPI5_RX 48 #define SPI5_RX_DMA_IRQ DMA2_Stream0_IRQn 49 #endif 50 51 /* DMA2 stream1 */ 52 #if defined(BSP_UART3_TX_USING_DMA) && !defined(BSP_UART3_TX_USING_INSTANCE) 53 #define UART3_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler 54 #define UART3_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 55 #define UART3_TX_DMA_INSTANCE DMA2_Stream1 56 #define UART3_TX_DMA_CHANNEL DMA_REQUEST_USART3_TX 57 #define UART3_TX_DMA_IRQ DMA2_Stream1_IRQn 58 #elif defined(BSP_SPI5_TX_USING_DMA) && !defined(SPI5_TX_DMA_INSTANCE) 59 #define SPI5_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler 60 #define SPI5_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 61 #define SPI5_TX_DMA_INSTANCE DMA2_Stream1 62 #define SPI5_TX_DMA_CHANNEL DMA_REQUEST_SPI5_TX 63 #define SPI5_TX_DMA_IRQ DMA2_Stream1_IRQn 64 #endif 65 66 /* DMA2 stream2 */ 67 #if defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) 68 #define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler 69 #define QSPI_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 70 #define QSPI_DMA_INSTANCE DMA2_Stream2 71 #define QSPI_DMA_CHANNEL DMA_CHANNEL_11 72 #define QSPI_DMA_IRQ DMA2_Stream2_IRQn 73 #endif 74 75 /* DMA2 stream3 */ 76 #if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) 77 #define UART4_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler 78 #define UART4_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 79 #define UART4_RX_DMA_INSTANCE DMA2_Stream3 80 #define UART4_RX_DMA_CHANNEL DMA_REQUEST_UART4_RX 81 #define UART4_RX_DMA_IRQ DMA2_Stream3_IRQn 82 #endif 83 84 /* DMA2 stream4 */ 85 #if defined(BSP_UART4_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE) 86 #define UART4_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler 87 #define UART4_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 88 #define UART4_TX_DMA_INSTANCE DMA2_Stream4 89 #define UART4_TX_DMA_CHANNEL DMA_REQUEST_UART4_TX 90 #define UART4_TX_DMA_IRQ DMA2_Stream4_IRQn 91 #endif 92 93 /* DMA2 stream5 */ 94 #if defined(BSP_USING_CRYP) && !defined(CRYP2_OUT_DMA_INSTANCE) 95 #define CRYP2_DMA_OUT_IRQHandler DMA2_Stream5_IRQHandler 96 #define CRYP2_OUT_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 97 #define CRYP2_OUT_DMA_INSTANCE DMA2_Stream5 98 #define CRYP2_OUT_DMA_CHANNEL DMA_REQUEST_CRYP2_OUT 99 #define CRYP2_OUT_DMA_IRQ DMA2_Stream5_IRQn 100 #endif 101 102 /* DMA2 stream6 */ 103 #if defined(BSP_USING_CRYP) && !defined(CRYP2_IN_DMA_INSTANCE) 104 #define CRYP2_DMA_IN_IRQHandler DMA2_Stream6_IRQHandler 105 #define CRYP2_IN_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 106 #define CRYP2_IN_DMA_INSTANCE DMA2_Stream6 107 #define CRYP2_IN_DMA_CHANNEL DMA_REQUEST_CRYP2_IN 108 #define CRYP2_IN_DMA_IRQ DMA2_Stream6_IRQn 109 #endif 110 111 /* DMA2 stream7 */ 112 #if defined(BSP_USING_HASH) && !defined(HASH2_IN_DMA_INSTANCE) 113 #define HASH2_DMA_IN_IRQHandler DMA2_Stream7_IRQHandler 114 #define HASH2_IN_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN 115 #define HASH2_IN_DMA_INSTANCE DMA2_Stream7 116 #define HASH2_IN_DMA_CHANNEL DMA_REQUEST_HASH2_IN 117 #define HASH2_IN_DMA_IRQ DMA2_Stream7_IRQn 118 #endif 119 120 #ifdef __cplusplus 121 } 122 #endif 123 124 #endif /* __DMA_CONFIG_H__ */ 125