1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2019-01-05 zylx first version 9 * 2019-01-08 SummerGift clean up the code 10 */ 11 12 #ifndef __DMA_CONFIG_H__ 13 #define __DMA_CONFIG_H__ 14 15 #include <rtthread.h> 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 /* DMA1 channel1 */ 22 23 /* DMA1 channel2 */ 24 #if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) 25 #define SPI1_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler 26 #define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA1EN 27 #define SPI1_RX_DMA_INSTANCE DMA1_Channel2 28 #define SPI1_RX_DMA_REQUEST DMA_REQUEST_1 29 #define SPI1_RX_DMA_IRQ DMA1_Channel2_IRQn 30 #endif 31 32 /* DMA1 channel3 */ 33 #if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) 34 #define SPI1_DMA_TX_IRQHandler DMA1_Channel3_IRQHandler 35 #define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA1EN 36 #define SPI1_TX_DMA_INSTANCE DMA1_Channel3 37 #define SPI1_TX_DMA_REQUEST DMA_REQUEST_1 38 #define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn 39 #elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) 40 #define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler 41 #define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN 42 #define UART3_RX_DMA_INSTANCE DMA1_Channel3 43 #define UART3_RX_DMA_REQUEST DMA_REQUEST_2 44 #define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn 45 #endif 46 47 /* DMA1 channel4 */ 48 #if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE) 49 #define UART1_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler 50 #define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA1EN 51 #define UART1_TX_DMA_INSTANCE DMA1_Channel4 52 #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 53 #define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn 54 #elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE) 55 #define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler 56 #define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN 57 #define SPI2_RX_DMA_INSTANCE DMA1_Channel4 58 #define SPI2_RX_DMA_REQUEST DMA_REQUEST_1 59 #define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn 60 #endif 61 62 /* DMA1 channel5 */ 63 #if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) 64 #define UART1_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler 65 #define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA1EN 66 #define UART1_RX_DMA_INSTANCE DMA1_Channel5 67 #define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX//DMA_REQUEST_2 68 #define UART1_RX_DMA_IRQ DMA1_Channel5_IRQn 69 #elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) 70 #define QSPI_DMA_IRQHandler DMA1_Channel5_IRQHandler 71 #define QSPI_DMA_RCC RCC_AHB1ENR_DMA1EN 72 #define QSPI_DMA_INSTANCE DMA1_Channel5 73 #define QSPI_DMA_REQUEST DMA_REQUEST_5 74 #define QSPI_DMA_IRQ DMA1_Channel5_IRQn 75 #elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE) 76 #define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler 77 #define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN 78 #define SPI2_TX_DMA_INSTANCE DMA1_Channel5 79 #define SPI2_TX_DMA_REQUEST DMA_REQUEST_1 80 #define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn 81 #endif 82 83 /* DMA1 channel6 */ 84 #if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) 85 #define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler 86 #define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN 87 #define UART2_RX_DMA_INSTANCE DMA1_Channel6 88 #define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX//DMA_REQUEST_2 89 #define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn 90 #endif 91 92 /* DMA1 channel7 */ 93 94 /* DMA2 channel1 */ 95 #if defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE) 96 #define UART5_DMA_TX_IRQHandler DMA2_Channel1_IRQHandler 97 #define UART5_TX_DMA_RCC RCC_AHB1ENR_DMA2EN 98 #define UART5_TX_DMA_INSTANCE DMA2_Channel1 99 #define UART5_TX_DMA_REQUEST DMA_REQUEST_2 100 #define UART5_TX_DMA_IRQ DMA2_Channel1_IRQn 101 #endif 102 103 /* DMA2 channel2 */ 104 #if defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE) 105 #define UART5_DMA_RX_IRQHandler DMA2_Channel2_IRQHandler 106 #define UART5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN 107 #define UART5_RX_DMA_INSTANCE DMA2_Channel2 108 #define UART5_RX_DMA_REQUEST DMA_REQUEST_2 109 #define UART5_RX_DMA_IRQ DMA2_Channel2_IRQn 110 #endif 111 112 /* DMA2 channel3 */ 113 #if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) 114 #define SPI1_DMA_RX_IRQHandler DMA2_Channel3_IRQHandler 115 #define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN 116 #define SPI1_RX_DMA_INSTANCE DMA2_Channel3 117 #define SPI1_RX_DMA_REQUEST DMA_REQUEST_4 118 #define SPI1_RX_DMA_IRQ DMA2_Channel3_IRQn 119 #endif 120 121 /* DMA2 channel4 */ 122 #if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) 123 #define SPI1_DMA_TX_IRQHandler DMA2_Channel4_IRQHandler 124 #define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN 125 #define SPI1_TX_DMA_INSTANCE DMA2_Channel4 126 #define SPI1_TX_DMA_REQUEST DMA_REQUEST_4 127 #define SPI1_TX_DMA_IRQ DMA2_Channel4_IRQn 128 #endif 129 130 /* DMA2 channel5 */ 131 132 /* DMA2 channel6 */ 133 #if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE) 134 #define UART1_DMA_TX_IRQHandler DMA2_Channel6_IRQHandler 135 #define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN 136 #define UART1_TX_DMA_INSTANCE DMA2_Channel6 137 #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 138 #define UART1_TX_DMA_IRQ DMA2_Channel6_IRQn 139 #endif 140 141 /* DMA2 channel7 */ 142 #if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) 143 #define UART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler 144 #define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN 145 #define UART1_RX_DMA_INSTANCE DMA2_Channel7 146 #define UART1_RX_DMA_REQUEST DMA_REQUEST_2 147 #define UART1_RX_DMA_IRQ DMA2_Channel7_IRQn 148 #elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) 149 #define QSPI_DMA_IRQHandler DMA2_Channel7_IRQHandler 150 #define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN 151 #define QSPI_DMA_INSTANCE DMA2_Channel7 152 #define QSPI_DMA_REQUEST DMA_REQUEST_3 153 #define QSPI_DMA_IRQ DMA2_Channel7_IRQn 154 #elif defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE) 155 #define LPUART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler 156 #define LPUART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN 157 #define LPUART1_RX_DMA_INSTANCE DMA2_Channel7 158 #define LPUART1_RX_DMA_REQUEST DMA_REQUEST_LPUART1_RX 159 #define LPUART1_RX_DMA_IRQ DMA2_Channel7_IRQn 160 #endif 161 162 /* DMA2 channel6 */ 163 #if defined(BSP_LPUART1_TX_USING_DMA) && !defined(LPUART1_TX_DMA_INSTANCE) 164 #define LPUART1_DMA_TX_IRQHandler DMA2_Channel6_IRQHandler 165 #define LPUART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN 166 #define LPUART1_TX_DMA_INSTANCE DMA2_Channel6 167 #define LPUART1_TX_DMA_REQUEST DMA_REQUEST_LPUART1_TX 168 #define LPUART1_TX_DMA_IRQ DMA2_Channel6_IRQn 169 #endif 170 171 172 #ifdef __cplusplus 173 } 174 #endif 175 176 #endif /* __DMA_CONFIG_H__ */ 177