1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L1xx_HAL_SPI_H 22 #define STM32L1xx_HAL_SPI_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l1xx_hal_def.h" 30 31 /** @addtogroup STM32L1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup SPI 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup SPI_Exported_Types SPI Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief SPI Configuration Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t Mode; /*!< Specifies the SPI operating mode. 50 This parameter can be a value of @ref SPI_Mode */ 51 52 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 53 This parameter can be a value of @ref SPI_Direction */ 54 55 uint32_t DataSize; /*!< Specifies the SPI data size. 56 This parameter can be a value of @ref SPI_Data_Size */ 57 58 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 59 This parameter can be a value of @ref SPI_Clock_Polarity */ 60 61 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 62 This parameter can be a value of @ref SPI_Clock_Phase */ 63 64 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 65 hardware (NSS pin) or by software using the SSI bit. 66 This parameter can be a value of @ref SPI_Slave_Select_management */ 67 68 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 69 used to configure the transmit and receive SCK clock. 70 This parameter can be a value of @ref SPI_BaudRate_Prescaler 71 @note The communication clock is derived from the master 72 clock. The slave clock does not need to be set. */ 73 74 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 75 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 76 77 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 78 This parameter can be a value of @ref SPI_TI_mode */ 79 80 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 81 This parameter can be a value of @ref SPI_CRC_Calculation */ 82 83 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 84 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 85 } SPI_InitTypeDef; 86 87 /** 88 * @brief HAL SPI State structure definition 89 */ 90 typedef enum 91 { 92 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 93 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 94 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 95 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 96 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 97 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 98 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 99 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 100 } HAL_SPI_StateTypeDef; 101 102 /** 103 * @brief SPI handle Structure definition 104 */ 105 typedef struct __SPI_HandleTypeDef 106 { 107 SPI_TypeDef *Instance; /*!< SPI registers base address */ 108 109 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 110 111 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 112 113 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 114 115 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 116 117 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 118 119 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 120 121 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 122 123 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 124 125 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 126 127 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 128 129 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 130 131 HAL_LockTypeDef Lock; /*!< Locking object */ 132 133 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 134 135 __IO uint32_t ErrorCode; /*!< SPI Error code */ 136 137 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 138 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 139 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 140 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 141 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 142 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 143 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 144 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 145 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 146 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 147 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 148 149 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 150 } SPI_HandleTypeDef; 151 152 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 153 /** 154 * @brief HAL SPI Callback ID enumeration definition 155 */ 156 typedef enum 157 { 158 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 159 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 160 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 161 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 162 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 163 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 164 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 165 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 166 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 167 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 168 169 } HAL_SPI_CallbackIDTypeDef; 170 171 /** 172 * @brief HAL SPI Callback pointer definition 173 */ 174 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 175 176 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 177 /** 178 * @} 179 */ 180 181 /* Exported constants --------------------------------------------------------*/ 182 /** @defgroup SPI_Exported_Constants SPI Exported Constants 183 * @{ 184 */ 185 186 /** @defgroup SPI_Error_Code SPI Error Code 187 * @{ 188 */ 189 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 190 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 191 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 192 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 193 #define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ 194 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 195 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 196 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 197 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 198 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 199 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 200 /** 201 * @} 202 */ 203 204 /** @defgroup SPI_Mode SPI Mode 205 * @{ 206 */ 207 #define SPI_MODE_SLAVE (0x00000000U) 208 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 209 /** 210 * @} 211 */ 212 213 /** @defgroup SPI_Direction SPI Direction Mode 214 * @{ 215 */ 216 #define SPI_DIRECTION_2LINES (0x00000000U) 217 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 218 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 219 /** 220 * @} 221 */ 222 223 /** @defgroup SPI_Data_Size SPI Data Size 224 * @{ 225 */ 226 #define SPI_DATASIZE_8BIT (0x00000000U) 227 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 228 /** 229 * @} 230 */ 231 232 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 233 * @{ 234 */ 235 #define SPI_POLARITY_LOW (0x00000000U) 236 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 237 /** 238 * @} 239 */ 240 241 /** @defgroup SPI_Clock_Phase SPI Clock Phase 242 * @{ 243 */ 244 #define SPI_PHASE_1EDGE (0x00000000U) 245 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 246 /** 247 * @} 248 */ 249 250 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 251 * @{ 252 */ 253 #define SPI_NSS_SOFT SPI_CR1_SSM 254 #define SPI_NSS_HARD_INPUT (0x00000000U) 255 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 256 /** 257 * @} 258 */ 259 260 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 261 * @{ 262 */ 263 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 264 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 265 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 266 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 267 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 268 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 269 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 270 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 271 /** 272 * @} 273 */ 274 275 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 276 * @{ 277 */ 278 #define SPI_FIRSTBIT_MSB (0x00000000U) 279 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 280 /** 281 * @} 282 */ 283 284 /** @defgroup SPI_TI_mode SPI TI Mode 285 * @brief SPI TI Mode not supported for Category 1 and 2 286 * @{ 287 */ 288 #define SPI_TIMODE_DISABLE (0x00000000U) 289 #if defined(SPI_CR2_FRF) 290 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 291 #endif 292 /** 293 * @} 294 */ 295 296 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 297 * @{ 298 */ 299 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 300 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 301 /** 302 * @} 303 */ 304 305 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 306 * @{ 307 */ 308 #define SPI_IT_TXE SPI_CR2_TXEIE 309 #define SPI_IT_RXNE SPI_CR2_RXNEIE 310 #define SPI_IT_ERR SPI_CR2_ERRIE 311 /** 312 * @} 313 */ 314 315 /** @defgroup SPI_Flags_definition SPI Flags Definition 316 * @{ 317 */ 318 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 319 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 320 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 321 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 322 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 323 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 324 #if defined(SPI_CR2_FRF) 325 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ 326 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ 327 | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) 328 #else 329 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\ 330 | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR) 331 #endif 332 /** 333 * @} 334 */ 335 336 /** 337 * @} 338 */ 339 340 /* Exported macros -----------------------------------------------------------*/ 341 /** @defgroup SPI_Exported_Macros SPI Exported Macros 342 * @{ 343 */ 344 345 /** @brief Reset SPI handle state. 346 * @param __HANDLE__ specifies the SPI Handle. 347 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 348 * @retval None 349 */ 350 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 351 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 352 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 353 (__HANDLE__)->MspInitCallback = NULL; \ 354 (__HANDLE__)->MspDeInitCallback = NULL; \ 355 } while(0) 356 #else 357 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 358 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 359 360 /** @brief Enable the specified SPI interrupts. 361 * @param __HANDLE__ specifies the SPI Handle. 362 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 363 * @param __INTERRUPT__ specifies the interrupt source to enable. 364 * This parameter can be one of the following values: 365 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 366 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 367 * @arg SPI_IT_ERR: Error interrupt enable 368 * @retval None 369 */ 370 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 371 372 /** @brief Disable the specified SPI interrupts. 373 * @param __HANDLE__ specifies the SPI handle. 374 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 375 * @param __INTERRUPT__ specifies the interrupt source to disable. 376 * This parameter can be one of the following values: 377 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 378 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 379 * @arg SPI_IT_ERR: Error interrupt enable 380 * @retval None 381 */ 382 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 383 384 /** @brief Check whether the specified SPI interrupt source is enabled or not. 385 * @param __HANDLE__ specifies the SPI Handle. 386 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 387 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 388 * This parameter can be one of the following values: 389 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 390 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 391 * @arg SPI_IT_ERR: Error interrupt enable 392 * @retval The new state of __IT__ (TRUE or FALSE). 393 */ 394 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 395 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 396 397 /** @brief Check whether the specified SPI flag is set or not. 398 * @param __HANDLE__ specifies the SPI Handle. 399 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 400 * @param __FLAG__ specifies the flag to check. 401 * This parameter can be one of the following values: 402 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 403 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 404 * @arg SPI_FLAG_CRCERR: CRC error flag 405 * @arg SPI_FLAG_MODF: Mode fault flag 406 * @arg SPI_FLAG_OVR: Overrun flag 407 * @arg SPI_FLAG_BSY: Busy flag 408 * @arg SPI_FLAG_FRE: Frame format error flag 409 * @retval The new state of __FLAG__ (TRUE or FALSE). 410 */ 411 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 412 413 /** @brief Clear the SPI CRCERR pending flag. 414 * @param __HANDLE__ specifies the SPI Handle. 415 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 416 * @retval None 417 */ 418 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 419 420 /** @brief Clear the SPI MODF pending flag. 421 * @param __HANDLE__ specifies the SPI Handle. 422 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 423 * @retval None 424 */ 425 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 426 do{ \ 427 __IO uint32_t tmpreg_modf = 0x00U; \ 428 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 429 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 430 UNUSED(tmpreg_modf); \ 431 } while(0U) 432 433 /** @brief Clear the SPI OVR pending flag. 434 * @param __HANDLE__ specifies the SPI Handle. 435 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 436 * @retval None 437 */ 438 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 439 do{ \ 440 __IO uint32_t tmpreg_ovr = 0x00U; \ 441 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 442 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 443 UNUSED(tmpreg_ovr); \ 444 } while(0U) 445 446 /** @brief Clear the SPI FRE pending flag. 447 * @param __HANDLE__ specifies the SPI Handle. 448 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 449 * @retval None 450 */ 451 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 452 do{ \ 453 __IO uint32_t tmpreg_fre = 0x00U; \ 454 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 455 UNUSED(tmpreg_fre); \ 456 }while(0U) 457 458 /** @brief Enable the SPI peripheral. 459 * @param __HANDLE__ specifies the SPI Handle. 460 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 461 * @retval None 462 */ 463 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 464 465 /** @brief Disable the SPI peripheral. 466 * @param __HANDLE__ specifies the SPI Handle. 467 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 468 * @retval None 469 */ 470 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 471 472 /** 473 * @} 474 */ 475 476 /* Private macros ------------------------------------------------------------*/ 477 /** @defgroup SPI_Private_Macros SPI Private Macros 478 * @{ 479 */ 480 481 /** @brief Set the SPI transmit-only mode. 482 * @param __HANDLE__ specifies the SPI Handle. 483 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 484 * @retval None 485 */ 486 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 487 488 /** @brief Set the SPI receive-only mode. 489 * @param __HANDLE__ specifies the SPI Handle. 490 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 491 * @retval None 492 */ 493 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 494 495 /** @brief Reset the CRC calculation of the SPI. 496 * @param __HANDLE__ specifies the SPI Handle. 497 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 498 * @retval None 499 */ 500 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 501 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) 502 503 /** @brief Check whether the specified SPI flag is set or not. 504 * @param __SR__ copy of SPI SR register. 505 * @param __FLAG__ specifies the flag to check. 506 * This parameter can be one of the following values: 507 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 508 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 509 * @arg SPI_FLAG_CRCERR: CRC error flag 510 * @arg SPI_FLAG_MODF: Mode fault flag 511 * @arg SPI_FLAG_OVR: Overrun flag 512 * @arg SPI_FLAG_BSY: Busy flag 513 * @arg SPI_FLAG_FRE: Frame format error flag 514 * @retval SET or RESET. 515 */ 516 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 517 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 518 519 /** @brief Check whether the specified SPI Interrupt is set or not. 520 * @param __CR2__ copy of SPI CR2 register. 521 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 522 * This parameter can be one of the following values: 523 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 524 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 525 * @arg SPI_IT_ERR: Error interrupt enable 526 * @retval SET or RESET. 527 */ 528 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 529 (__INTERRUPT__)) ? SET : RESET) 530 531 /** @brief Checks if SPI Mode parameter is in allowed range. 532 * @param __MODE__ specifies the SPI Mode. 533 * This parameter can be a value of @ref SPI_Mode 534 * @retval None 535 */ 536 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 537 ((__MODE__) == SPI_MODE_MASTER)) 538 539 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 540 * @param __MODE__ specifies the SPI Direction Mode. 541 * This parameter can be a value of @ref SPI_Direction 542 * @retval None 543 */ 544 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 545 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 546 ((__MODE__) == SPI_DIRECTION_1LINE)) 547 548 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 549 * @param __MODE__ specifies the SPI Direction Mode. 550 * @retval None 551 */ 552 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 553 554 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 555 * @param __MODE__ specifies the SPI Direction Mode. 556 * @retval None 557 */ 558 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 559 ((__MODE__) == SPI_DIRECTION_1LINE)) 560 561 /** @brief Checks if SPI Data Size parameter is in allowed range. 562 * @param __DATASIZE__ specifies the SPI Data Size. 563 * This parameter can be a value of @ref SPI_Data_Size 564 * @retval None 565 */ 566 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 567 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 568 569 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 570 * @param __CPOL__ specifies the SPI serial clock steady state. 571 * This parameter can be a value of @ref SPI_Clock_Polarity 572 * @retval None 573 */ 574 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 575 ((__CPOL__) == SPI_POLARITY_HIGH)) 576 577 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 578 * @param __CPHA__ specifies the SPI Clock Phase. 579 * This parameter can be a value of @ref SPI_Clock_Phase 580 * @retval None 581 */ 582 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 583 ((__CPHA__) == SPI_PHASE_2EDGE)) 584 585 /** @brief Checks if SPI Slave Select parameter is in allowed range. 586 * @param __NSS__ specifies the SPI Slave Select management parameter. 587 * This parameter can be a value of @ref SPI_Slave_Select_management 588 * @retval None 589 */ 590 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 591 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 592 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 593 594 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 595 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 596 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 597 * @retval None 598 */ 599 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 600 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 601 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 602 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 603 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 604 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 605 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 606 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 607 608 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 609 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 610 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 611 * @retval None 612 */ 613 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 614 ((__BIT__) == SPI_FIRSTBIT_LSB)) 615 616 #if defined(SPI_I2SCFGR_I2SMOD) 617 /** @brief Checks if SPI TI mode parameter is in allowed range. 618 * @param __MODE__ specifies the SPI TI mode. 619 * This parameter can be a value of @ref SPI_TI_mode 620 * @retval None 621 */ 622 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ 623 ((__MODE__) == SPI_TIMODE_ENABLE)) 624 #else 625 /** @defgroup SPI_TI_mode SPI TI mode disable 626 * @brief SPI TI Mode not supported for Category 1 and 2 627 * @{ 628 */ 629 #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) 630 631 #endif 632 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 633 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 634 * This parameter can be a value of @ref SPI_CRC_Calculation 635 * @retval None 636 */ 637 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 638 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 639 640 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 641 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 642 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 643 * @retval None 644 */ 645 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 646 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 647 (((__POLYNOMIAL__)&0x1U) != 0U)) 648 649 /** @brief Checks if DMA handle is valid. 650 * @param __HANDLE__ specifies a DMA Handle. 651 * @retval None 652 */ 653 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 654 655 /** 656 * @} 657 */ 658 659 /* Exported functions --------------------------------------------------------*/ 660 /** @addtogroup SPI_Exported_Functions 661 * @{ 662 */ 663 664 /** @addtogroup SPI_Exported_Functions_Group1 665 * @{ 666 */ 667 /* Initialization/de-initialization functions ********************************/ 668 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 669 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 670 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 671 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 672 673 /* Callbacks Register/UnRegister functions ***********************************/ 674 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 675 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); 676 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 677 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 678 /** 679 * @} 680 */ 681 682 /** @addtogroup SPI_Exported_Functions_Group2 683 * @{ 684 */ 685 /* I/O operation functions ***************************************************/ 686 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 687 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 688 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, 689 uint32_t Timeout); 690 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 691 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 692 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 693 uint16_t Size); 694 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 695 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 696 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 697 uint16_t Size); 698 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 699 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 700 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 701 /* Transfer Abort functions */ 702 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 703 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 704 705 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 706 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 707 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 708 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 709 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 710 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 711 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 712 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 713 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 714 /** 715 * @} 716 */ 717 718 /** @addtogroup SPI_Exported_Functions_Group3 719 * @{ 720 */ 721 /* Peripheral State and Error functions ***************************************/ 722 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 723 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 724 /** 725 * @} 726 */ 727 728 /** 729 * @} 730 */ 731 732 /** 733 * @} 734 */ 735 736 /** 737 * @} 738 */ 739 740 #ifdef __cplusplus 741 } 742 #endif 743 744 #endif /* STM32L1xx_HAL_SPI_H */ 745 746 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 747