1 /**
2 ******************************************************************************
3 * @file stm32l1xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #if defined(USE_FULL_LL_DRIVER)
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32l1xx_ll_usart.h"
24 #include "stm32l1xx_ll_rcc.h"
25 #include "stm32l1xx_ll_bus.h"
26 #ifdef USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif
31
32 /** @addtogroup STM32L1xx_LL_Driver
33 * @{
34 */
35
36 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
37
38 /** @addtogroup USART_LL
39 * @{
40 */
41
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /** @addtogroup USART_LL_Private_Constants
46 * @{
47 */
48
49 /**
50 * @}
51 */
52
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
60 * divided by the smallest oversampling used on the USART (i.e. 8) */
61 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
62
63 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
64 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
65
66 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
67 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
68 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
69 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
70
71 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
72 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
73 || ((__VALUE__) == LL_USART_PARITY_ODD))
74
75 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
76 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
77
78 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
79 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
80
81 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
82 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
83
84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
85 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
86
87 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
88 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
89
90 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
91 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
92
93 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
94 || ((__VALUE__) == LL_USART_STOPBITS_1) \
95 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
96 || ((__VALUE__) == LL_USART_STOPBITS_2))
97
98 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
99 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
100 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
101 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
102
103 /**
104 * @}
105 */
106
107 /* Private function prototypes -----------------------------------------------*/
108
109 /* Exported functions --------------------------------------------------------*/
110 /** @addtogroup USART_LL_Exported_Functions
111 * @{
112 */
113
114 /** @addtogroup USART_LL_EF_Init
115 * @{
116 */
117
118 /**
119 * @brief De-initialize USART registers (Registers restored to their default values).
120 * @param USARTx USART Instance
121 * @retval An ErrorStatus enumeration value:
122 * - SUCCESS: USART registers are de-initialized
123 * - ERROR: USART registers are not de-initialized
124 */
LL_USART_DeInit(USART_TypeDef * USARTx)125 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
126 {
127 ErrorStatus status = SUCCESS;
128
129 /* Check the parameters */
130 assert_param(IS_UART_INSTANCE(USARTx));
131
132 if (USARTx == USART1)
133 {
134 /* Force reset of USART clock */
135 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
136
137 /* Release reset of USART clock */
138 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
139 }
140 else if (USARTx == USART2)
141 {
142 /* Force reset of USART clock */
143 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
144
145 /* Release reset of USART clock */
146 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
147 }
148 else if (USARTx == USART3)
149 {
150 /* Force reset of USART clock */
151 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
152
153 /* Release reset of USART clock */
154 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
155 }
156 #if defined(UART4)
157 else if (USARTx == UART4)
158 {
159 /* Force reset of UART clock */
160 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
161
162 /* Release reset of UART clock */
163 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
164 }
165 #endif /* UART4 */
166 #if defined(UART5)
167 else if (USARTx == UART5)
168 {
169 /* Force reset of UART clock */
170 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
171
172 /* Release reset of UART clock */
173 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
174 }
175 #endif /* UART5 */
176 else
177 {
178 status = ERROR;
179 }
180
181 return (status);
182 }
183
184 /**
185 * @brief Initialize USART registers according to the specified
186 * parameters in USART_InitStruct.
187 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
188 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
189 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
190 * @param USARTx USART Instance
191 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
192 * that contains the configuration information for the specified USART peripheral.
193 * @retval An ErrorStatus enumeration value:
194 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
195 * - ERROR: Problem occurred during USART Registers initialization
196 */
LL_USART_Init(USART_TypeDef * USARTx,LL_USART_InitTypeDef * USART_InitStruct)197 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
198 {
199 ErrorStatus status = ERROR;
200 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
201 LL_RCC_ClocksTypeDef rcc_clocks;
202
203 /* Check the parameters */
204 assert_param(IS_UART_INSTANCE(USARTx));
205 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
206 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
207 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
208 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
209 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
210 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
211 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
212
213 /* USART needs to be in disabled state, in order to be able to configure some bits in
214 CRx registers */
215 if (LL_USART_IsEnabled(USARTx) == 0U)
216 {
217 /*---------------------------- USART CR1 Configuration -----------------------
218 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
219 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
220 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
221 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
222 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
223 */
224 MODIFY_REG(USARTx->CR1,
225 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
226 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
227 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
228 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
229
230 /*---------------------------- USART CR2 Configuration -----------------------
231 * Configure USARTx CR2 (Stop bits) with parameters:
232 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
233 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
234 */
235 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
236
237 /*---------------------------- USART CR3 Configuration -----------------------
238 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
239 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
240 */
241 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
242
243 /*---------------------------- USART BRR Configuration -----------------------
244 * Retrieve Clock frequency used for USART Peripheral
245 */
246 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
247 if (USARTx == USART1)
248 {
249 periphclk = rcc_clocks.PCLK2_Frequency;
250 }
251 else if (USARTx == USART2)
252 {
253 periphclk = rcc_clocks.PCLK1_Frequency;
254 }
255 else if (USARTx == USART3)
256 {
257 periphclk = rcc_clocks.PCLK1_Frequency;
258 }
259 #if defined(UART4)
260 else if (USARTx == UART4)
261 {
262 periphclk = rcc_clocks.PCLK1_Frequency;
263 }
264 #endif /* UART4 */
265 #if defined(UART5)
266 else if (USARTx == UART5)
267 {
268 periphclk = rcc_clocks.PCLK1_Frequency;
269 }
270 #endif /* UART5 */
271 else
272 {
273 /* Nothing to do, as error code is already assigned to ERROR value */
274 }
275
276 /* Configure the USART Baud Rate :
277 - valid baud rate value (different from 0) is required
278 - Peripheral clock as returned by RCC service, should be valid (different from 0).
279 */
280 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
281 && (USART_InitStruct->BaudRate != 0U))
282 {
283 status = SUCCESS;
284 LL_USART_SetBaudRate(USARTx,
285 periphclk,
286 USART_InitStruct->OverSampling,
287 USART_InitStruct->BaudRate);
288
289 /* Check BRR is greater than or equal to 16d */
290 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
291 }
292 }
293 /* Endif (=> USART not in Disabled state => return ERROR) */
294
295 return (status);
296 }
297
298 /**
299 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
300 * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure
301 * whose fields will be set to default values.
302 * @retval None
303 */
304
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)305 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
306 {
307 /* Set USART_InitStruct fields to default values */
308 USART_InitStruct->BaudRate = 9600U;
309 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
310 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
311 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
312 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
313 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
314 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
315 }
316
317 /**
318 * @brief Initialize USART Clock related settings according to the
319 * specified parameters in the USART_ClockInitStruct.
320 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
321 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
322 * @param USARTx USART Instance
323 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
324 * that contains the Clock configuration information for the specified USART peripheral.
325 * @retval An ErrorStatus enumeration value:
326 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
327 * - ERROR: Problem occurred during USART Registers initialization
328 */
LL_USART_ClockInit(USART_TypeDef * USARTx,LL_USART_ClockInitTypeDef * USART_ClockInitStruct)329 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
330 {
331 ErrorStatus status = SUCCESS;
332
333 /* Check USART Instance and Clock signal output parameters */
334 assert_param(IS_UART_INSTANCE(USARTx));
335 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
336
337 /* USART needs to be in disabled state, in order to be able to configure some bits in
338 CRx registers */
339 if (LL_USART_IsEnabled(USARTx) == 0U)
340 {
341 /*---------------------------- USART CR2 Configuration -----------------------*/
342 /* If Clock signal has to be output */
343 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
344 {
345 /* Deactivate Clock signal delivery :
346 * - Disable Clock Output: USART_CR2_CLKEN cleared
347 */
348 LL_USART_DisableSCLKOutput(USARTx);
349 }
350 else
351 {
352 /* Ensure USART instance is USART capable */
353 assert_param(IS_USART_INSTANCE(USARTx));
354
355 /* Check clock related parameters */
356 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
357 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
358 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
359
360 /*---------------------------- USART CR2 Configuration -----------------------
361 * Configure USARTx CR2 (Clock signal related bits) with parameters:
362 * - Enable Clock Output: USART_CR2_CLKEN set
363 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
364 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
365 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
366 */
367 MODIFY_REG(USARTx->CR2,
368 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
369 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
370 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
371 }
372 }
373 /* Else (USART not in Disabled state => return ERROR */
374 else
375 {
376 status = ERROR;
377 }
378
379 return (status);
380 }
381
382 /**
383 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
384 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
385 * whose fields will be set to default values.
386 * @retval None
387 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)388 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
389 {
390 /* Set LL_USART_ClockInitStruct fields with default values */
391 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
392 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
393 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
394 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
395 }
396
397 /**
398 * @}
399 */
400
401 /**
402 * @}
403 */
404
405 /**
406 * @}
407 */
408
409 #endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
410
411 /**
412 * @}
413 */
414
415 #endif /* USE_FULL_LL_DRIVER */
416
417 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
418
419