1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-12-21 zylx first version 9 */ 10 11 #include "board.h" 12 SystemClock_Config(void)13void SystemClock_Config(void) 14 { 15 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 16 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 17 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 18 19 /**Initializes the CPU, AHB and APB busses clocks 20 */ 21 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 22 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 23 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 25 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 26 RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; 27 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 28 { 29 Error_Handler(); 30 } 31 /**Initializes the CPU, AHB and APB busses clocks 32 */ 33 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 34 |RCC_CLOCKTYPE_PCLK1; 35 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 36 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 37 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 38 39 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 40 { 41 Error_Handler(); 42 } 43 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 44 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; 45 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 46 { 47 Error_Handler(); 48 } 49 } 50