1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 */ 10 11 #include "board.h" 12 SystemClock_Config(void)13void SystemClock_Config(void) 14 { 15 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 16 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 17 18 /**Configure the main internal regulator output voltage 19 */ 20 __HAL_RCC_PWR_CLK_ENABLE(); 21 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 22 /**Initializes the CPU, AHB and APB busses clocks 23 */ 24 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 25 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 26 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 27 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 28 RCC_OscInitStruct.PLL.PLLM = 4; 29 RCC_OscInitStruct.PLL.PLLN = 168; 30 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 31 RCC_OscInitStruct.PLL.PLLQ = 4; 32 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 33 { 34 Error_Handler(); 35 } 36 /**Initializes the CPU, AHB and APB busses clocks 37 */ 38 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 39 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 40 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 41 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 42 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 43 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 44 45 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) 46 { 47 Error_Handler(); 48 } 49 } 50