1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018-11-5      SummerGift   first version
9  */
10 
11 #ifndef __BOARD_H__
12 #define __BOARD_H__
13 
14 #include <stm32l1xx.h>
15 #include "drv_common.h"
16 #include "drv_gpio.h"
17 
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21 
22 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
23 #define STM32_FLASH_SIZE             (128 * 1024)
24 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
25 
26 /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
27 #define STM32_SRAM_SIZE      16
28 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
29 
30 #if defined(__ARMCC_VERSION)
31 extern int Image$$RW_IRAM1$$ZI$$Limit;
32 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
33 #elif __ICCARM__
34 #pragma section="CSTACK"
35 #define HEAP_BEGIN      (__segment_end("CSTACK"))
36 #else
37 extern int __bss_end;
38 #define HEAP_BEGIN      ((void *)&__bss_end)
39 #endif
40 
41 #define HEAP_END        STM32_SRAM_END
42 
43 void SystemClock_Config(void);
44 
45 #ifdef __cplusplus
46 }
47 #endif
48 
49 #endif /* __BOARD_H__ */
50