1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 */ 10 11 #include "board.h" 12 SystemClock_Config(void)13void SystemClock_Config(void) 14 { 15 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 16 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 17 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 18 19 /**Initializes the CPU, AHB and APB busses clocks 20 */ 21 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 22 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 23 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 25 RCC_OscInitStruct.PLL.PLLM = 1; 26 RCC_OscInitStruct.PLL.PLLN = 20; 27 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; 28 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 29 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 30 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 31 { 32 Error_Handler(); 33 } 34 /**Initializes the CPU, AHB and APB busses clocks 35 */ 36 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 37 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 38 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 39 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 40 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 41 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 42 43 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 44 { 45 Error_Handler(); 46 } 47 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 48 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 49 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 50 { 51 Error_Handler(); 52 } 53 /**Configure the main internal regulator output voltage 54 */ 55 if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 56 { 57 Error_Handler(); 58 } 59 } 60