1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 * 2019-04-09 WillianChan add stm32f103-dofly-M3S BSP 10 */ 11 12 #include <board.h> 13 #include <drv_common.h> 14 SystemClock_Config(void)15void SystemClock_Config(void) 16 { 17 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 18 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 19 20 /** Initializes the CPU, AHB and APB busses clocks 21 */ 22 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 23 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 24 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 25 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 26 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 27 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 28 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 29 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 30 { 31 Error_Handler(); 32 } 33 /** Initializes the CPU, AHB and APB busses clocks 34 */ 35 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 36 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 37 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 38 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 39 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 40 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 41 42 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 43 { 44 Error_Handler(); 45 } 46 } 47