1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 */ 10 11 #include <board.h> 12 #include <drv_common.h> 13 SystemClock_Config(void)14void SystemClock_Config(void) 15 { 16 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 17 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 18 19 /** Configure the main internal regulator output voltage 20 */ 21 __HAL_RCC_PWR_CLK_ENABLE(); 22 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); 23 24 /** Initializes the RCC Oscillators according to the specified parameters 25 * in the RCC_OscInitTypeDef structure. 26 */ 27 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; 28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 29 RCC_OscInitStruct.LSIState = RCC_LSI_ON; 30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 31 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 32 RCC_OscInitStruct.PLL.PLLM = 25; 33 RCC_OscInitStruct.PLL.PLLN = 168; 34 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 35 RCC_OscInitStruct.PLL.PLLQ = 4; 36 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 37 { 38 Error_Handler(); 39 } 40 41 /** Initializes the CPU, AHB and APB buses clocks 42 */ 43 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 44 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 45 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 46 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 47 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 48 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 49 50 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 51 { 52 Error_Handler(); 53 } 54 } 55