1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 * 2023-08-20 Donocean Configure Main clock to 168MHz 10 */ 11 12 #include <board.h> 13 #include <drv_common.h> 14 SystemClock_Config(void)15void SystemClock_Config(void) 16 { 17 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 18 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 19 20 /**Configure the main internal regulator output voltage 21 */ 22 __HAL_RCC_PWR_CLK_ENABLE(); 23 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 24 /**Initializes the CPU, AHB and APB busses clocks 25 */ 26 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 27 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 29 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 30 RCC_OscInitStruct.PLL.PLLM = 25; 31 RCC_OscInitStruct.PLL.PLLN = 336; 32 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 33 RCC_OscInitStruct.PLL.PLLQ = 4; 34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 35 { 36 Error_Handler(); 37 } 38 /**Initializes the CPU, AHB and APB busses clocks 39 */ 40 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 41 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 42 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 43 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 44 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 45 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 46 47 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) 48 { 49 Error_Handler(); 50 } 51 } 52