1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 */ 10 11 #include <board.h> 12 #include <drv_common.h> 13 SystemClock_Config(void)14void SystemClock_Config(void) 15 { 16 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 17 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 18 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 19 20 /** Configure the main internal regulator output voltage 21 */ 22 __HAL_RCC_PWR_CLK_ENABLE(); 23 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 24 /** Initializes the CPU, AHB and APB busses clocks 25 */ 26 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; 27 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 28 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 29 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 30 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 31 RCC_OscInitStruct.PLL.PLLM = 15; 32 RCC_OscInitStruct.PLL.PLLN = 144; 33 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; 34 RCC_OscInitStruct.PLL.PLLQ = 5; 35 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 36 { 37 Error_Handler(); 38 } 39 /** Initializes the CPU, AHB and APB busses clocks 40 */ 41 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 42 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 43 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 44 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 45 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 46 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 47 48 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 49 { 50 Error_Handler(); 51 } 52 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; 53 PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 54 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 55 { 56 Error_Handler(); 57 } 58 } 59