1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018-11-7      zylx         first version
9  */
10 
11 #include "board.h"
12 
13 /** System Clock Configuration
14 */
SystemClock_Config(void)15 void SystemClock_Config(void)
16 {
17     RCC_OscInitTypeDef RCC_OscInitStruct = {0};
18     RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
19     RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
20 
21     /**Configure the main internal regulator output voltage
22     */
23     __HAL_RCC_PWR_CLK_ENABLE();
24     __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
25     /**Initializes the CPU, AHB and APB busses clocks
26     */
27     RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
28                                 |RCC_OSCILLATORTYPE_LSE;
29     RCC_OscInitStruct.HSEState = RCC_HSE_ON;
30     RCC_OscInitStruct.LSEState = RCC_LSE_ON;
31     RCC_OscInitStruct.LSIState = RCC_LSI_ON;
32     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
33     RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
34     RCC_OscInitStruct.PLL.PLLM = 4;
35     RCC_OscInitStruct.PLL.PLLN = 180;
36     RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
37     RCC_OscInitStruct.PLL.PLLQ = 8;
38     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
39     {
40       Error_Handler();
41     }
42     /**Activate the Over-Drive mode
43     */
44     if (HAL_PWREx_EnableOverDrive() != HAL_OK)
45     {
46       Error_Handler();
47     }
48     /**Initializes the CPU, AHB and APB busses clocks
49     */
50     RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
51                                 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
52     RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
53     RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
54     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
55     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
56 
57     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
58     {
59       Error_Handler();
60     }
61     PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_RTC;
62     PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
63     PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
64     PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
65     PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
66     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
67     {
68       Error_Handler();
69     }
70 }
71