1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 * 2019-04-09 WillianChan add stm32f469-st-disco bsp 10 */ 11 12 #include <board.h> 13 #include <drv_common.h> 14 SystemClock_Config(void)15void SystemClock_Config(void) 16 { 17 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 18 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 19 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 20 21 /** Configure the main internal regulator output voltage 22 */ 23 __HAL_RCC_PWR_CLK_ENABLE(); 24 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 25 /** Initializes the CPU, AHB and APB busses clocks 26 */ 27 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 29 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 30 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 31 RCC_OscInitStruct.PLL.PLLM = 8; 32 RCC_OscInitStruct.PLL.PLLN = 360; 33 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 34 RCC_OscInitStruct.PLL.PLLQ = 9; 35 RCC_OscInitStruct.PLL.PLLR = 6; 36 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 37 { 38 Error_Handler(); 39 } 40 /** Activate the Over-Drive mode 41 */ 42 if (HAL_PWREx_EnableOverDrive() != HAL_OK) 43 { 44 Error_Handler(); 45 } 46 /** Initializes the CPU, AHB and APB busses clocks 47 */ 48 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 49 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 50 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 51 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 52 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 53 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 54 55 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) 56 { 57 Error_Handler(); 58 } 59 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48 60 |RCC_PERIPHCLK_LTDC; 61 PeriphClkInitStruct.PLLI2S.PLLI2SN = 192; 62 PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; 63 PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; 64 PeriphClkInitStruct.PLLSAI.PLLSAIR = 2; 65 PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4; 66 PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2; 67 PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; 68 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 69 { 70 Error_Handler(); 71 } 72 } 73