1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018-11-06     SummerGift   first version
9  * 2019-1-10      e31207077    add stm32f767-st-nucleo bsp
10  */
11 
12 #include "board.h"
13 
14 /**
15   * @brief System Clock Configuration
16   * @retval None
17   */
SystemClock_Config(void)18 void SystemClock_Config(void)
19 {
20   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
21   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
22   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
23 
24   /**Configure LSE Drive Capability
25   */
26   HAL_PWR_EnableBkUpAccess();
27   /**Configure the main internal regulator output voltage
28   */
29   __HAL_RCC_PWR_CLK_ENABLE();
30   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
31   /**Initializes the CPU, AHB and APB busses clocks
32   */
33   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
34   RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
35   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
36   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
37   RCC_OscInitStruct.PLL.PLLM = 8;
38   RCC_OscInitStruct.PLL.PLLN = 432;
39   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
40   RCC_OscInitStruct.PLL.PLLQ = 9;
41   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
42   {
43     Error_Handler();
44   }
45   /**Activate the Over-Drive mode
46   */
47   if (HAL_PWREx_EnableOverDrive() != HAL_OK)
48   {
49     Error_Handler();
50   }
51   /**Initializes the CPU, AHB and APB busses clocks
52   */
53   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
54                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
55   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
56   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
57   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
58   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
59 
60   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
61   {
62     Error_Handler();
63   }
64   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_CLK48;
65   PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
66   PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
67   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
68   {
69     Error_Handler();
70   }
71 }
72 
73