1 /*
2  * Copyright (c) 2006-2023, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2023-12-22     ChuShicheng  first version
9  */
10 
11 #include "board.h"
12 
13 /**
14   * @brief System Clock Configuration
15   * @retval None
16   */
SystemClock_Config(void)17 void SystemClock_Config(void)
18 {
19   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
20   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
21 
22   /** Configure the main internal regulator output voltage
23   */
24   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
25 
26   while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
27 
28   /** Initializes the RCC Oscillators according to the specified parameters
29   * in the RCC_OscInitTypeDef structure.
30   */
31   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
32   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
33   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
34   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
35   RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
36   RCC_OscInitStruct.PLL.PLLM = 12;
37   RCC_OscInitStruct.PLL.PLLN = 250;
38   RCC_OscInitStruct.PLL.PLLP = 2;
39   RCC_OscInitStruct.PLL.PLLQ = 2;
40   RCC_OscInitStruct.PLL.PLLR = 2;
41   RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
42   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
43   RCC_OscInitStruct.PLL.PLLFRACN = 0;
44   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
45   {
46     Error_Handler();
47   }
48 
49   /** Initializes the CPU, AHB and APB buses clocks
50   */
51   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
52                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
53                               |RCC_CLOCKTYPE_PCLK3;
54   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
55   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
56   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
57   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
58   RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
59 
60   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
61   {
62     Error_Handler();
63   }
64 }
65