1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2019-04-14     whj4674672   first version
9  */
10 #include <rtthread.h>
11 #include "stm32h7xx.h"
12 
mpu_init(void)13 int mpu_init(void)
14 {
15     MPU_Region_InitTypeDef MPU_InitStruct;
16 
17     /* Disable the MPU */
18     HAL_MPU_Disable();
19 
20     /* Configure the MPU attributes as WT for AXI SRAM */
21     MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
22     MPU_InitStruct.BaseAddress       = 0x24000000;
23     MPU_InitStruct.Size              = MPU_REGION_SIZE_512KB;
24     MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
25     MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
26     MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
27     MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
28     MPU_InitStruct.Number            = MPU_REGION_NUMBER0;
29     MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
30     MPU_InitStruct.SubRegionDisable  = 0X00;
31     MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
32 
33     HAL_MPU_ConfigRegion(&MPU_InitStruct);
34 
35 #ifdef BSP_USING_SDRAM
36     /* Configure the MPU attributes as WT for SDRAM */
37     MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
38     MPU_InitStruct.BaseAddress       = 0xC0000000;
39     MPU_InitStruct.Size              = MPU_REGION_SIZE_32MB;
40     MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
41     MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
42     MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
43     MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
44     MPU_InitStruct.Number            = MPU_REGION_NUMBER1;
45     MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
46     MPU_InitStruct.SubRegionDisable  = 0x00;
47     MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
48 
49     HAL_MPU_ConfigRegion(&MPU_InitStruct);
50 #endif
51 
52     /* Enable the MPU */
53     HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
54 
55     /* Enable CACHE */
56     SCB_EnableICache();
57     SCB_EnableDCache();
58 
59     return 0;
60 
61 }
62 INIT_BOARD_EXPORT(mpu_init);
63