1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2020-05-23     liuduanfei   first version
9  */
10 
11 #ifndef __DRV_SDIO_H__
12 #define __DRV_SDIO_H__
13 
14 #include <rtthread.h>
15 #include "rtdevice.h"
16 #include <rthw.h>
17 #include <drv_common.h>
18 #include <string.h>
19 #include <drivers/dev_mmcsd_core.h>
20 #include <drivers/dev_sdio.h>
21 
22 #define SDIO_BUFF_SIZE       4096
23 #define SDIO_ALIGN_LEN       32
24 
25 #ifndef SDIO_BASE_ADDRESS
26 #define SDIO_BASE_ADDRESS    (0x52007000)
27 #endif
28 
29 #ifndef SDIO_CLOCK_FREQ
30 #define SDIO_CLOCK_FREQ      (200U * 1000 * 1000)
31 #endif
32 
33 #ifndef SDIO_BUFF_SIZE
34 #define SDIO_BUFF_SIZE       (4096)
35 #endif
36 
37 #ifndef SDIO_ALIGN_LEN
38 #define SDIO_ALIGN_LEN       (32)
39 #endif
40 
41 #ifndef SDIO_MAX_FREQ
42 #define SDIO_MAX_FREQ        (25 * 1000 * 1000)
43 #endif
44 
45 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
46 
47 #define SDIO_ERRORS \
48     (SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \
49      SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \
50      SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \
51      SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL)
52 
53 #define SDIO_MASKR_ALL \
54     (SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \
55      SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \
56      SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE)
57 
58 #define HW_SDIO_DATATIMEOUT                 (0xFFFFFFFFU)
59 
60 struct stm32_sdio
61 {
62     volatile rt_uint32_t power;         /* offset 0x00 */
63     volatile rt_uint32_t clkcr;         /* offset 0x04 */
64     volatile rt_uint32_t arg;           /* offset 0x08 */
65     volatile rt_uint32_t cmd;           /* offset 0x0C */
66     volatile rt_uint32_t respcmd;       /* offset 0x10 */
67     volatile rt_uint32_t resp1;         /* offset 0x14 */
68     volatile rt_uint32_t resp2;         /* offset 0x18 */
69     volatile rt_uint32_t resp3;         /* offset 0x1C */
70     volatile rt_uint32_t resp4;         /* offset 0x20 */
71     volatile rt_uint32_t dtimer;        /* offset 0x24 */
72     volatile rt_uint32_t dlen;          /* offset 0x28 */
73     volatile rt_uint32_t dctrl;         /* offset 0x2C */
74     volatile rt_uint32_t dcount;        /* offset 0x30 */
75     volatile rt_uint32_t sta;           /* offset 0x34 */
76     volatile rt_uint32_t icr;           /* offset 0x38 */
77     volatile rt_uint32_t mask;          /* offset 0x3C */
78     volatile rt_uint32_t acktimer;      /* offset 0x40 */
79     volatile rt_uint32_t reserved0[3];  /* offset 0x44 ~ 0x4C */
80     volatile rt_uint32_t idmatrlr;      /* offset 0x50 */
81     volatile rt_uint32_t idmabsizer;    /* offset 0x54 */
82     volatile rt_uint32_t idmabase0r;    /* offset 0x58 */
83     volatile rt_uint32_t idmabase1r;    /* offset 0x5C */
84     volatile rt_uint32_t reserved1[8];  /* offset 0x60 ~ 7C */
85     volatile rt_uint32_t fifo;          /* offset 0x80 */
86 };
87 
88 typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
89 
90 struct stm32_sdio_des
91 {
92     struct stm32_sdio *hw_sdio;
93     sdio_clk_get clk_get;
94 };
95 
96 /* stm32 sdio dirver class */
97 struct stm32_sdio_class
98 {
99     struct stm32_sdio_des *des;
100     const struct stm32_sdio_config *cfg;
101     struct rt_mmcsd_host host;
102 };
103 
104 extern void stm32_mmcsd_change(void);
105 
106 #endif /* __DRV_SDIO_H__ */
107