1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 */ 10 11 #include "board.h" 12 13 /** 14 * @brief System Clock Configuration 15 * @retval None 16 */ SystemClock_Config(void)17void SystemClock_Config(void) 18 { 19 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 20 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 21 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 22 23 /** Supply configuration update enable 24 */ 25 HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); 26 /** Configure the main internal regulator output voltage 27 */ 28 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); 29 30 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} 31 /** Initializes the CPU, AHB and APB busses clocks 32 */ 33 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 34 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 35 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 36 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 37 RCC_OscInitStruct.PLL.PLLM = 1; 38 RCC_OscInitStruct.PLL.PLLN = 120; 39 RCC_OscInitStruct.PLL.PLLP = 2; 40 RCC_OscInitStruct.PLL.PLLQ = 2; 41 RCC_OscInitStruct.PLL.PLLR = 2; 42 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; 43 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; 44 RCC_OscInitStruct.PLL.PLLFRACN = 0; 45 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 46 { 47 Error_Handler(); 48 } 49 /** Initializes the CPU, AHB and APB busses clocks 50 */ 51 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK 52 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 53 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; 54 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 55 RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; 56 RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; 57 RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; 58 RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; 59 RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; 60 RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; 61 62 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 63 { 64 Error_Handler(); 65 } 66 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3; 67 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; 68 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 69 { 70 Error_Handler(); 71 } 72 } 73