1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2020-05-23 liuduanfei first version 9 * 2020-08-25 wanghaijing add sdmmmc2 10 */ 11 12 #ifndef __DRV_SDIO_H__ 13 #define __DRV_SDIO_H__ 14 15 #include <rtthread.h> 16 #include "rtdevice.h" 17 #include <rthw.h> 18 #include <drv_common.h> 19 #include <string.h> 20 #include <drivers/dev_mmcsd_core.h> 21 #include <drivers/dev_sdio.h> 22 23 #define SDIO_BUFF_SIZE 4096 24 #define SDIO_ALIGN_LEN 32 25 26 #ifndef SDIO1_BASE_ADDRESS 27 #define SDIO1_BASE_ADDRESS (0x52007000) 28 #endif 29 30 #ifndef SDIO2_BASE_ADDRESS 31 #define SDIO2_BASE_ADDRESS (0x48022400) 32 #endif 33 34 #ifndef SDIO_CLOCK_FREQ 35 #define SDIO_CLOCK_FREQ (200U * 1000 * 1000) 36 #endif 37 38 #ifndef SDIO_BUFF_SIZE 39 #define SDIO_BUFF_SIZE (4096) 40 #endif 41 42 #ifndef SDIO_ALIGN_LEN 43 #define SDIO_ALIGN_LEN (32) 44 #endif 45 46 #ifndef SDIO_MAX_FREQ 47 #define SDIO_MAX_FREQ (25 * 1000 * 1000) 48 #endif 49 50 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) 51 52 #define SDIO_ERRORS \ 53 (SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \ 54 SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \ 55 SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \ 56 SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL) 57 58 #define SDIO_MASKR_ALL \ 59 (SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \ 60 SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \ 61 SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE) 62 63 #define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU) 64 65 struct stm32_sdio 66 { 67 volatile rt_uint32_t power; /* offset 0x00 */ 68 volatile rt_uint32_t clkcr; /* offset 0x04 */ 69 volatile rt_uint32_t arg; /* offset 0x08 */ 70 volatile rt_uint32_t cmd; /* offset 0x0C */ 71 volatile rt_uint32_t respcmd; /* offset 0x10 */ 72 volatile rt_uint32_t resp1; /* offset 0x14 */ 73 volatile rt_uint32_t resp2; /* offset 0x18 */ 74 volatile rt_uint32_t resp3; /* offset 0x1C */ 75 volatile rt_uint32_t resp4; /* offset 0x20 */ 76 volatile rt_uint32_t dtimer; /* offset 0x24 */ 77 volatile rt_uint32_t dlen; /* offset 0x28 */ 78 volatile rt_uint32_t dctrl; /* offset 0x2C */ 79 volatile rt_uint32_t dcount; /* offset 0x30 */ 80 volatile rt_uint32_t sta; /* offset 0x34 */ 81 volatile rt_uint32_t icr; /* offset 0x38 */ 82 volatile rt_uint32_t mask; /* offset 0x3C */ 83 volatile rt_uint32_t acktimer; /* offset 0x40 */ 84 volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */ 85 volatile rt_uint32_t idmatrlr; /* offset 0x50 */ 86 volatile rt_uint32_t idmabsizer; /* offset 0x54 */ 87 volatile rt_uint32_t idmabase0r; /* offset 0x58 */ 88 volatile rt_uint32_t idmabase1r; /* offset 0x5C */ 89 volatile rt_uint32_t reserved1[8]; /* offset 0x60 ~ 7C */ 90 volatile rt_uint32_t fifo; /* offset 0x80 */ 91 }; 92 93 typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio); 94 95 struct stm32_sdio_des 96 { 97 struct stm32_sdio *hw_sdio; 98 sdio_clk_get clk_get; 99 SD_HandleTypeDef hsd; 100 }; 101 102 /* stm32 sdio dirver class */ 103 struct stm32_sdio_class 104 { 105 struct stm32_sdio_des *des; 106 const struct stm32_sdio_config *cfg; 107 struct rt_mmcsd_host host; 108 }; 109 110 extern void sdcard_change(void); 111 112 #endif /* __DRV_SDIO_H__ */ 113