1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018-11-06     SummerGift   first version
9  */
10 
11 #include <board.h>
12 #include <drv_common.h>
13 
SystemClock_Config(void)14 void SystemClock_Config(void)
15 {
16 
17   RCC_OscInitTypeDef RCC_OscInitStruct;
18   RCC_ClkInitTypeDef RCC_ClkInitStruct;
19   RCC_PeriphCLKInitTypeDef PeriphClkInit;
20 
21     /**Configure LSE Drive Capability
22     */
23   HAL_PWR_EnableBkUpAccess();
24 
25   __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
26 
27     /**Initializes the CPU, AHB and APB busses clocks
28     */
29   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
30   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
31   RCC_OscInitStruct.MSIState = RCC_MSI_ON;
32   RCC_OscInitStruct.MSICalibrationValue = 0;
33   RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
34   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
35   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
36   RCC_OscInitStruct.PLL.PLLM = 1;
37   RCC_OscInitStruct.PLL.PLLN = 16;
38   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
39   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
40   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
41   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
42   {
43     _Error_Handler(__FILE__, __LINE__);
44   }
45 
46     /**Initializes the CPU, AHB and APB busses clocks
47     */
48   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
49                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
50   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
51   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
52   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
53   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
54 
55   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
56   {
57     _Error_Handler(__FILE__, __LINE__);
58   }
59 
60   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
61   PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
62   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
63   {
64     _Error_Handler(__FILE__, __LINE__);
65   }
66 
67     /**Configure the main internal regulator output voltage
68     */
69   if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
70   {
71     _Error_Handler(__FILE__, __LINE__);
72   }
73 
74     /**Configure the Systick interrupt time
75     */
76   HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
77 
78     /**Configure the Systick
79     */
80   HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
81 
82     /**Enable MSI Auto calibration
83     */
84   HAL_RCCEx_EnableMSIPLLMode();
85 
86   /* SysTick_IRQn interrupt configuration */
87   HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
88 }
89