1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2021-12-05     supperthomas      first version
9  */
10 
11 #ifndef __BOARD_H__
12 #define __BOARD_H__
13 
14 #include <stm32l4xx.h>
15 
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19 
20 #ifdef BSP_USING_GPIO
21 #include "drv_gpio.h"
22 
23 /* Board Pin definitions */
24 
25 #endif /* BSP_USING_GPIO */
26 
27 /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
28 #define STM32_SRAM_SIZE      64
29 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
30 
31 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
32 #define STM32_FLASH_SIZE             (256 * 1024)
33 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
34 
35 #if defined(__ARMCC_VERSION)
36 extern int Image$$RW_IRAM1$$ZI$$Limit;
37 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
38 #elif __ICCARM__
39 #pragma section="CSTACK"
40 #define HEAP_BEGIN      (__segment_end("CSTACK"))
41 #else
42 extern int __bss_end;
43 #define HEAP_BEGIN      ((void *)&__bss_end)
44 #endif
45 
46 #define HEAP_END        STM32_SRAM_END
47 
48 void SystemClock_Config(void);
49 
50 #ifdef __cplusplus
51 }
52 #endif
53 
54 #endif
55 
56