1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2018-11-5      SummerGift   first version
9  */
10 
11 #ifndef __BOARD_H__
12 #define __BOARD_H__
13 
14 #include <stm32l4xx.h>
15 
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19 
20 #define STM32_FLASH_START_ADRESS       ((uint32_t)0x08000000)
21 #define STM32_FLASH_SIZE               (512 * 1024)
22 #define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
23 
24 #define STM32_SRAM1_SIZE               (96)
25 #define STM32_SRAM1_START              (0x20000000)
26 #define STM32_SRAM1_END                (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
27 
28 #if defined(__ARMCC_VERSION)
29 extern int Image$$RW_IRAM1$$ZI$$Limit;
30 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
31 #elif __ICCARM__
32 #pragma section="CSTACK"
33 #define HEAP_BEGIN      (__segment_end("CSTACK"))
34 #else
35 extern int __bss_end;
36 #define HEAP_BEGIN      ((void *)&__bss_end)
37 #endif
38 
39 #define HEAP_END                       STM32_SRAM1_END
40 
41 void SystemClock_Config(void);
42 void SystemClock_MSI_ON(void);
43 void SystemClock_MSI_OFF(void);
44 void SystemClock_80M(void);
45 void SystemClock_24M(void);
46 void SystemClock_2M(void);
47 void SystemClock_ReConfig(uint8_t mode);
48 
49 #ifdef __cplusplus
50 }
51 #endif
52 
53 #endif
54 
55