1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2019-3-19 tyustli first version 9 */ 10 11 #include <board.h> 12 #include <drv_common.h> 13 SystemClock_Config(void)14void SystemClock_Config(void) 15 { 16 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 17 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 18 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 19 20 /** Initializes the CPU, AHB and APB busses clocks 21 */ 22 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 23 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 24 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 25 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 26 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; 27 RCC_OscInitStruct.PLL.PLLM = 1; 28 RCC_OscInitStruct.PLL.PLLN = 10; 29 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; 30 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 31 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 32 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 33 { 34 Error_Handler(); 35 } 36 /** Initializes the CPU, AHB and APB busses clocks 37 */ 38 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 39 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 40 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 41 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 42 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 43 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 44 45 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 46 { 47 Error_Handler(); 48 } 49 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 50 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_SYSCLK; 51 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 52 { 53 Error_Handler(); 54 } 55 /** Configure the main internal regulator output voltage 56 */ 57 if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 58 { 59 Error_Handler(); 60 } 61 } 62 63 64